Message ID | 20200312142904.232822-1-tudor.ambarus@microchip.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | fdd8eef4be53fcb4f50dbe4c6ee7a334a395f9ee |
Headers | show |
Series | mmc: sdhci-of-at91: Display clock changes for debug purpose only | expand |
On 3/12/2020 3:29 PM, Tudor Ambarus - M18064 wrote: > From: Cristian Birsan <cristian.birsan@microchip.com> > > The sdhci_at91_set_clks_presets() function is called multiple times > at runtime and the messages are shown on the console. Display clk mul, > gck rate and clk base for debug porpose only. s/porpose/purpose > > Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Thanks > --- > drivers/mmc/host/sdhci-of-at91.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c > index ab2bd314a390..88f17abb69a7 100644 > --- a/drivers/mmc/host/sdhci-of-at91.c > +++ b/drivers/mmc/host/sdhci-of-at91.c > @@ -204,8 +204,8 @@ static int sdhci_at91_set_clks_presets(struct device *dev) > /* Set capabilities in ro mode. */ > writel(0, host->ioaddr + SDMMC_CACR); > > - dev_info(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", > - clk_mul, gck_rate, clk_base_rate); > + dev_dbg(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", > + clk_mul, gck_rate, clk_base_rate); > > /* > * We have to set preset values because it depends on the clk_mul
On 12/03/20 4:29 pm, Tudor.Ambarus@microchip.com wrote: > From: Cristian Birsan <cristian.birsan@microchip.com> > > The sdhci_at91_set_clks_presets() function is called multiple times > at runtime and the messages are shown on the console. Display clk mul, > gck rate and clk base for debug porpose only. > > Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> > --- > drivers/mmc/host/sdhci-of-at91.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c > index ab2bd314a390..88f17abb69a7 100644 > --- a/drivers/mmc/host/sdhci-of-at91.c > +++ b/drivers/mmc/host/sdhci-of-at91.c > @@ -204,8 +204,8 @@ static int sdhci_at91_set_clks_presets(struct device *dev) > /* Set capabilities in ro mode. */ > writel(0, host->ioaddr + SDMMC_CACR); > > - dev_info(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", > - clk_mul, gck_rate, clk_base_rate); > + dev_dbg(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", > + clk_mul, gck_rate, clk_base_rate); > > /* > * We have to set preset values because it depends on the clk_mul >
On Thu, 12 Mar 2020 at 15:29, <Tudor.Ambarus@microchip.com> wrote: > > From: Cristian Birsan <cristian.birsan@microchip.com> > > The sdhci_at91_set_clks_presets() function is called multiple times > at runtime and the messages are shown on the console. Display clk mul, > gck rate and clk base for debug porpose only. > > Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Applied for next, thanks! Kind regards Uffe > --- > drivers/mmc/host/sdhci-of-at91.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c > index ab2bd314a390..88f17abb69a7 100644 > --- a/drivers/mmc/host/sdhci-of-at91.c > +++ b/drivers/mmc/host/sdhci-of-at91.c > @@ -204,8 +204,8 @@ static int sdhci_at91_set_clks_presets(struct device *dev) > /* Set capabilities in ro mode. */ > writel(0, host->ioaddr + SDMMC_CACR); > > - dev_info(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", > - clk_mul, gck_rate, clk_base_rate); > + dev_dbg(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", > + clk_mul, gck_rate, clk_base_rate); > > /* > * We have to set preset values because it depends on the clk_mul > -- > 2.23.0
diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c index ab2bd314a390..88f17abb69a7 100644 --- a/drivers/mmc/host/sdhci-of-at91.c +++ b/drivers/mmc/host/sdhci-of-at91.c @@ -204,8 +204,8 @@ static int sdhci_at91_set_clks_presets(struct device *dev) /* Set capabilities in ro mode. */ writel(0, host->ioaddr + SDMMC_CACR); - dev_info(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", - clk_mul, gck_rate, clk_base_rate); + dev_dbg(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", + clk_mul, gck_rate, clk_base_rate); /* * We have to set preset values because it depends on the clk_mul