diff mbox series

[PATCHv2,2/2] clk: meson: g12a: set cpub_clk flags to CLK_IS_CRITICAL

Message ID 20200302125310.742-3-linux.amoon@gmail.com (mailing list archive)
State Changes Requested, archived
Headers show
Series Odroid N2 failes to boot using upstream kernel using microSD card | expand

Commit Message

Anand Moon March 2, 2020, 12:53 p.m. UTC
On Odroid n2, cpub_clk is not geting enable, which lead the stalling
at booting of the device, updating flags to CLK_IS_CRITICAL which help
enable all the parent for cpub_clk.

Fixes: ffae8475b90c (clk: meson: g12a: add notifiers to handle cpu clock change);
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
Previous changes
	fix the commit $subject and $message as previously I was
        wrong on the my findings.
        Added the Fixed tags to the commit.

Following Neil's suggestion, I have prepared this patch.
https://patchwork.kernel.org/patch/11177441/#22964889
---
 drivers/clk/meson/g12a.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Kevin Hilman March 2, 2020, 5:01 p.m. UTC | #1
Anand Moon <linux.amoon@gmail.com> writes:

> On Odroid n2, cpub_clk is not geting enable, which lead the stalling
> at booting of the device,

First, how is the CPU_B clk related to the SD card issue described in
the cover letter?  I think this patch is attempting to fix something
unrelated to the SD card.  Please separate from this series (or describe
in detail how it's related to the SD card booting.)

Also, we're missing lots of details here to be able to help.  Are you
using the u-boot from hardkernel?  your own?  something else?  What's
the version?

Can you share logs (including u-boot logs) showing how your kernel is
booting and full kernel boot log (including the stalls.)

> updating flags to CLK_IS_CRITICAL which help enable all the parent for
> cpub_clk.

With current mainline, I've tested DVFS using CPUfreq on both clusters
on odroid-n2, and both clusters are booting, so I don't understand the
need for this patch.  

It's not related to your problem (I don't think) but for the regulators
used by each cluster, the PWM driver is needed, and there's a bug/race
in the probing of the PWM regulators used for CPU_B.  If you make the
PWM regulators, built-in this problem goes away for CPUfreq.

Just for kicks, can you build your kernel with CONFIG_PWM_MESON=y
(currently defaults to =n) and see if you have any better results with
booting.

And FYI, any use of CLK_IS_CRITICAL will be very highly scrutinized.
You will need detailed justification for adding this flag since it most
often is just masking some other bug.

Kevin

> Fixes: ffae8475b90c (clk: meson: g12a: add notifiers to handle cpu clock change);
> Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> Cc: Jerome Brunet <jbrunet@baylibre.com>
> Cc: Neil Armstrong <narmstrong@baylibre.com>
> Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
> Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> ---
> Previous changes
> 	fix the commit $subject and $message as previously I was
>         wrong on the my findings.
>         Added the Fixed tags to the commit.
>
> Following Neil's suggestion, I have prepared this patch.
> https://patchwork.kernel.org/patch/11177441/#22964889
> ---
>  drivers/clk/meson/g12a.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
> index d2760a021301..7237d08b4112 100644
> --- a/drivers/clk/meson/g12a.c
> +++ b/drivers/clk/meson/g12a.c
> @@ -681,7 +681,7 @@ static struct clk_regmap g12b_cpub_clk = {
>  			&g12a_sys_pll.hw
>  		},
>  		.num_parents = 2,
> -		.flags = CLK_SET_RATE_PARENT,
> +		.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
>  	},
>  };
>  
> -- 
> 2.25.1
Martin Blumenstingl March 19, 2020, 11:39 p.m. UTC | #2
Hi Kevin,

On Mon, Mar 2, 2020 at 6:01 PM Kevin Hilman <khilman@baylibre.com> wrote:
[...]
> > updating flags to CLK_IS_CRITICAL which help enable all the parent for
> > cpub_clk.
>
> With current mainline, I've tested DVFS using CPUfreq on both clusters
> on odroid-n2, and both clusters are booting, so I don't understand the
> need for this patch.
I *think* there is a race condition at kernel boot between cpufreq and
disabling orphaned clocks
I'm not sure I fully understand it though and I don't have any G12B
board to verify it

my understanding is that u-boot runs Linux off CPU0 which is clocked by cpub_clk
this means we need to keep cpub_clk enabled as long as Linux wants the
CPU0 processor to be enabled (on 32-bit ARM platforms that would be
smp_operations.cpu_{kill,die})
cpufreq does not call clk_prepare_enable on the CPU clocks so this
means that the orphaned clock cleanup mechanism can disable it "at any
time", killing everything running on CPU0 and CPU1 (which are both
clocked by cpub_clk)

I have no explanation why this depends on booting from SD or eMMC.

for the 32-bit SoCs we have CLK_IS_CRITICAL on the CPU clock as well
since commit 0dad1ec65bc30a
on G12A we have CLK_IS_CRITICAL on the sys_pll clocks, however my
understanding is that cpub_clk could also be fed by one of the
fixed_pll derived clocks (which have a gate as well, which may or may
not be turned off by the orphaned clock cleanup - that is pure
speculation from my side though).


Martin
Anand Moon March 20, 2020, 6:42 a.m. UTC | #3
Hi Martin / Kevin,

On Fri, 20 Mar 2020 at 05:09, Martin Blumenstingl
<martin.blumenstingl@googlemail.com> wrote:
>
> Hi Kevin,
>
> On Mon, Mar 2, 2020 at 6:01 PM Kevin Hilman <khilman@baylibre.com> wrote:
> [...]
> > > updating flags to CLK_IS_CRITICAL which help enable all the parent for
> > > cpub_clk.
> >
> > With current mainline, I've tested DVFS using CPUfreq on both clusters
> > on odroid-n2, and both clusters are booting, so I don't understand the
> > need for this patch.
> I *think* there is a race condition at kernel boot between cpufreq and
> disabling orphaned clocks
> I'm not sure I fully understand it though and I don't have any G12B
> board to verify it
>
> my understanding is that u-boot runs Linux off CPU0 which is clocked by cpub_clk
> this means we need to keep cpub_clk enabled as long as Linux wants the
> CPU0 processor to be enabled (on 32-bit ARM platforms that would be
> smp_operations.cpu_{kill,die})
> cpufreq does not call clk_prepare_enable on the CPU clocks so this
> means that the orphaned clock cleanup mechanism can disable it "at any
> time", killing everything running on CPU0 and CPU1 (which are both
> clocked by cpub_clk)
>
> I have no explanation why this depends on booting from SD or eMMC.
>
> for the 32-bit SoCs we have CLK_IS_CRITICAL on the CPU clock as well
> since commit 0dad1ec65bc30a
> on G12A we have CLK_IS_CRITICAL on the sys_pll clocks, however my
> understanding is that cpub_clk could also be fed by one of the
> fixed_pll derived clocks (which have a gate as well, which may or may
> not be turned off by the orphaned clock cleanup - that is pure
> speculation from my side though).
>
>
> Martin

Thanks for this new input I will carefully check these details once again.

I am attaching small scripts on how I build the image with mainline
u-boot and mainline kernel.
So I am able to reproduce this issue on SD card.
Hoping some body could reproduce this issue at their end and share the feedback.
If their is some issue from my side please let me know.

-Anand
----------------------------
Step 1 : Script to build the prepare the image.
---------------------------
#!/bin/bash +x

wget http://os.archlinuxarm.org/os/ArchLinuxARM-aarch64-latest.tar.gz

FILE=/dev/mmcblk0p1
if [ -b "$FILE" ]; then
        export DISK=/dev/mmcblk0
        sudo sudo wipefs -a ${DISK}p1
        sudo dd if=/dev/zero of=${DISK} bs=1M count=512

        sudo sfdisk ${DISK} <<-__EOF__
        16M,,L,*
        __EOF__

        sudo mkfs.ext4 ${DISK}p1
        sync

        sudo mount ${DISK}p1 root
        sync
        sudo bsdtar -xpf ArchLinuxARM-aarch64-latest.tar.gz -C root
        sync

        # create custom boot.scr
        mkimage -A arm -O linux -T script -C none -n "Arch U-Boot boot script Odroid N2" -d boot-odroidn2.txt boot.scr
        sudo cp -v boot.scr     root/boot/
        sync
        sudo umount root
else
        echo "$FILE does not exist"
fi

----------------------
my boot-odroidn2.txt converted to boot.scr
----------------------
# After modifying, run ./mkscr

test -n "${distro_bootpart}" || setenv distro_bootpart 1
part uuid ${devtype} ${devnum}:${distro_bootpart} uuid
setenv bootargs "console=ttyAML0,115200n8 root=PARTUUID=${uuid} rw rootwait earlycon no_console_suspend"

if load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} /boot/Image; then
  if load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} /boot/dtbs/${fdtfile}; then
    if load ${devtype} ${devnum}:${distro_bootpart} ${ramdisk_addr_r} /boot/initramfs-linux.img; then
      booti ${kernel_addr_r} ${ramdisk_addr_r}:${filesize} ${fdt_addr_r};
    else
      booti ${kernel_addr_r} - ${fdt_addr_r};
    fi;
  fi;
fi

------------------------
Step 2: Build and flash the mainline u-boot to the sdcard / eMMC.
------------------------
#!/bin/bash
set +x

# U-Boot for ODROID-N2
rm u-boot-n2/fip/u-boot.bin.sd.bin

git clone https://gitlab.denx.de/u-boot/u-boot.git u-boot-n2
cd u-boot-n2

# u-boot compilation
# ==================

git pull origin master
export ARCH=arm64
export CROSS_COMPILE=aarch64-linux-gnu-
make distclean
make odroid-n2_defconfig all

# ==============
cd ..
wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH

DIR=odroid-n2
git clone --depth 1 \
    https://github.com/hardkernel/u-boot.git -b odroidn2-v2015.01 \
    $DIR

cd odroid-n2
git pull origin master
make distclean
make odroidn2_defconfig
make
export UBOOTDIR=$PWD

# Go back to mainline U-Boot source tree then :
cd ../u-boot-n2
mkdir fip

wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
cp -v $UBOOTDIR/build/scp_task/bl301.bin fip/
cp -v $UBOOTDIR/build/board/hardkernel/odroidn2/firmware/acs.bin fip/
cp -v $UBOOTDIR/fip/g12b/bl2.bin fip/
cp -v $UBOOTDIR/fip/g12b/bl30.bin fip/
cp -v $UBOOTDIR/fip/g12b/bl31.img fip/
cp -v $UBOOTDIR/fip/g12b/ddr3_1d.fw fip/
cp -v $UBOOTDIR/fip/g12b/ddr4_1d.fw fip/
cp -v $UBOOTDIR/fip/g12b/ddr4_2d.fw fip/
cp -v $UBOOTDIR/fip/g12b/diag_lpddr4.fw fip/
cp -v $UBOOTDIR/fip/g12b/lpddr4_1d.fw fip/
cp -v $UBOOTDIR/fip/g12b/lpddr4_2d.fw fip/
cp -v $UBOOTDIR/fip/g12b/piei.fw fip/
cp -v $UBOOTDIR/fip/g12b/aml_ddr.fw fip/
cp -v u-boot.bin fip/bl33.bin

bash fip/blx_fix.sh \
     fip/bl30.bin \
     fip/zero_tmp \
     fip/bl30_zero.bin \
     fip/bl301.bin \
     fip/bl301_zero.bin \
     fip/bl30_new.bin \
     bl30

bash fip/blx_fix.sh \
     fip/bl2.bin \
     fip/zero_tmp \
     fip/bl2_zero.bin \
     fip/acs.bin \
     fip/bl21_zero.bin \
     fip/bl2_new.bin \
     bl2

$UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
                                --output fip/bl30_new.bin.g12a.enc \
                                --level v3
$UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
                                --output fip/bl30_new.bin.enc \
                                --level v3 --type bl30
$UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
                                --output fip/bl31.img.enc \
                                --level v3 --type bl31
$UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
                                --output fip/bl33.bin.enc \
                                --level v3 --type bl33 --compress lz4
$UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
                                --output fip/bl2.n.bin.sig
$UBOOTDIR/fip/g12b/aml_encrypt_g12b --bootmk \
        --output fip/u-boot.bin \
        --bl2 fip/bl2.n.bin.sig \
        --bl30 fip/bl30_new.bin.enc \
        --bl31 fip/bl31.img.enc \
        --bl33 fip/bl33.bin.enc \
        --ddrfw1 fip/ddr4_1d.fw \
        --ddrfw2 fip/ddr4_2d.fw \
        --ddrfw3 fip/ddr3_1d.fw \
        --ddrfw4 fip/piei.fw \
        --ddrfw5 fip/lpddr4_1d.fw \
        --ddrfw6 fip/lpddr4_2d.fw \
        --ddrfw7 fip/diag_lpddr4.fw \
        --ddrfw8 fip/aml_ddr.fw \
        --level v3


-----------------------------------
Step 3: Flash the u-boot image
-----------------------------------
FILE=/dev/mmcblk0
if [ -b "$FILE" ]; then
        DEV=/dev/mmcblk0
        sudo dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
        sudo dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
else
       echo "$FILE does not exist"
fi

---------------------------------
With this step you will have working build image to boot the kernel.
---------------------------------

--------------------------------------
Step 4: For closs compile and build the kernel
--------------------------------------

export GCC_COLORS=auto

make ARCH=arm64 mrproper
make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- defconfig
make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- -j$(nproc) dtbs Image modules

mkdir -p media
sudo mount /dev/mmcblk0p1 ./media
sudo cp -v arch/arm64/boot/Image ./media/boot/
sudo cp -v arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dtb ./media/boot/dtbs/amlogic/meson-gxbb-odroidc2.dtb
sudo cp -v arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb ./media/boot/dtbs/amlogic/meson-g12b-odroid-n2.dtb
sudo make ARCH=arm64 LOCALVERSION=-xmlt modules_install INSTALL_MOD_PATH=./media && sync && sudo umount ./media && sudo rm -rf ./media
Jerome Brunet March 23, 2020, 9:03 a.m. UTC | #4
On Fri 20 Mar 2020 at 00:39, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote:

> Hi Kevin,
>
> On Mon, Mar 2, 2020 at 6:01 PM Kevin Hilman <khilman@baylibre.com> wrote:
> [...]
>> > updating flags to CLK_IS_CRITICAL which help enable all the parent for
>> > cpub_clk.
>>
>> With current mainline, I've tested DVFS using CPUfreq on both clusters
>> on odroid-n2, and both clusters are booting, so I don't understand the
>> need for this patch.
> I *think* there is a race condition at kernel boot between cpufreq and
> disabling orphaned clocks
> I'm not sure I fully understand it though and I don't have any G12B
> board to verify it
>
> my understanding is that u-boot runs Linux off CPU0 which is clocked by cpub_clk
> this means we need to keep cpub_clk enabled as long as Linux wants the
> CPU0 processor to be enabled (on 32-bit ARM platforms that would be
> smp_operations.cpu_{kill,die})
> cpufreq does not call clk_prepare_enable on the CPU clocks so this
> means that the orphaned clock cleanup mechanism can disable it "at any
> time",

If nothing calls enable the cpu clock while it is managed by Linux
(cpufreq), there might something worth fixing. Adding CLK_IS_CRITICAL
will mask an issue that is still not explained.

"at any time": absolutely not.
Disabling unused clocks, is done only once, at during the late_init
stage.

If your clock gets disabled later on, it means it has been turned on and
off by another driver (possibly due to probe deferral)

> killing everything running on CPU0 and CPU1 (which are both
> clocked by cpub_clk)
>
> I have no explanation why this depends on booting from SD or eMMC.
>
> for the 32-bit SoCs we have CLK_IS_CRITICAL on the CPU clock as well
> since commit 0dad1ec65bc30a
> on G12A we have CLK_IS_CRITICAL on the sys_pll clocks, however my
> understanding is that cpub_clk could also be fed by one of the
> fixed_pll derived clocks (which have a gate as well, which may or may
> not be turned off by the orphaned clock cleanup - that is pure
> speculation from my side though).

Yes there are other critical clocks on Amlogic, mostly because the SCP Fw
driver does not claim the clocks it depends on. At least we know why
this flag is set and there should be a comment associated with it.

ATM, the issue reported by Anand (anyone else ?) is not explained. 

>
>
> Martin
diff mbox series

Patch

diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index d2760a021301..7237d08b4112 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -681,7 +681,7 @@  static struct clk_regmap g12b_cpub_clk = {
 			&g12a_sys_pll.hw
 		},
 		.num_parents = 2,
-		.flags = CLK_SET_RATE_PARENT,
+		.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 	},
 };