| Message ID | 20200303004137.1099502-1-jiaxun.yang@flygoat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v1] mips/mips_malta: Allow more than 2G RAM | expand |
Please post new patches as v2, and do not post them as reply to v1. On 3/3/20 1:41 AM, Jiaxun Yang wrote: > When malta is coupled with MIPS64 cpu which have 64bit > address space, it is possible to have more than 2G RAM. > > So we removed ram_size check and overwrite memory > layout for these targets. > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > Suggested-by: Yunqiang Su <ysu@wavecomp.com> > -- > v1: Do not overwrite cmdline when we don't have highmem. > --- > hw/mips/mips_malta.c | 29 +++++++++++++++++++++++------ > 1 file changed, 23 insertions(+), 6 deletions(-) > > diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c > index 6e7ba9235d..4267958f35 100644 > --- a/hw/mips/mips_malta.c > +++ b/hw/mips/mips_malta.c > @@ -98,7 +98,8 @@ typedef struct { > } MaltaState; > > static struct _loaderparams { > - int ram_size, ram_low_size; > + unsigned int ram_low_size; > + ram_addr_t ram_size; > const char *kernel_filename; > const char *kernel_cmdline; > const char *initrd_filename; > @@ -1023,6 +1024,7 @@ static int64_t load_kernel(void) > { > int64_t kernel_entry, kernel_high, initrd_size; > long kernel_size; > + char mem_cmdline[128]; > ram_addr_t initrd_offset; > int big_endian; > uint32_t *prom_buf; > @@ -1099,20 +1101,33 @@ static int64_t load_kernel(void) > prom_buf = g_malloc(prom_size); > > prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_filename); > + > + memset(&mem_cmdline[0], 0, sizeof(mem_cmdline)); > + if (loaderparams.ram_size > 0x10000000) { Please use 256 * MiB. > + /* > + * Always use cmdline to overwrite mem layout > + * as kernel may reject large emesize. > + */ > + sprintf(&mem_cmdline[0], > + "mem=0x10000000@0x00000000 mem=0x%" PRIx64 "@0x90000000", > + loaderparams.ram_size - 0x10000000); Ditto. Also please use g_strdup_printf("mem=0x%" PRIx64 "@...")/g_free. > + } > + > if (initrd_size > 0) { > prom_set(prom_buf, prom_index++, > - "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", > - xlate_to_kseg0(NULL, initrd_offset), > + "%s rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", > + &mem_cmdline[0], xlate_to_kseg0(NULL, initrd_offset), > initrd_size, loaderparams.kernel_cmdline); > } else { > - prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_cmdline); > + prom_set(prom_buf, prom_index++, "%s %s", &mem_cmdline[0], > + loaderparams.kernel_cmdline); > } > > prom_set(prom_buf, prom_index++, "memsize"); > prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_low_size); > > prom_set(prom_buf, prom_index++, "ememsize"); > - prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_size); > + prom_set(prom_buf, prom_index++, "%lu", loaderparams.ram_size); > > prom_set(prom_buf, prom_index++, "modetty0"); > prom_set(prom_buf, prom_index++, "38400n8r"); > @@ -1253,12 +1268,14 @@ void mips_malta_init(MachineState *machine) > /* create CPU */ > mips_create_cpu(machine, s, &cbus_irq, &i8259_irq); > > - /* allocate RAM */ > +#ifdef TARGET_MIPS32 > + /* MIPS32 won't accept more than 2GiB RAM due to limited address space */ Cc'ing Paul Burton due to commit 94c2b6aff43. > if (ram_size > 2 * GiB) { > error_report("Too much memory for this machine: %" PRId64 "MB," > " maximum 2048MB", ram_size / MiB); This is annoying, because the CoreLV/CoreFPGA core cards only have 4 DIMM slots for PC-100 SDRAM, and the Memory Controller of the GT–64120A north bridge accept at most 256 MiB per SCS for address decoding, so we have a maximum of 1 GiB on 32-bit boards. In 64-bit emulation we use the a 20Kc core, provided by the Core20K core card which doesn't use the GT–64120A but the Bonito64. So the model is incorrect... The Bonito64 indeed allow more memory. Maybe it is time to consider that for 64-bit targets, since we are not modelling a Malta core board, we can name it the official 'virt' machine... > exit(1); > } > +#endif > > /* register RAM at high address where it is undisturbed by IO */ > memory_region_add_subregion(system_memory, 0x80000000, machine->ram); >
On Thu, Mar 5, 2020 at 11:18 AM Philippe Mathieu-Daudé <philmd@redhat.com> wrote: > > Please post new patches as v2, and do not post them as reply to v1. > > On 3/3/20 1:41 AM, Jiaxun Yang wrote: > > When malta is coupled with MIPS64 cpu which have 64bit > > address space, it is possible to have more than 2G RAM. > > > > So we removed ram_size check and overwrite memory > > layout for these targets. > > > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > > Suggested-by: Yunqiang Su <ysu@wavecomp.com> > > -- > > v1: Do not overwrite cmdline when we don't have highmem. > > --- > > hw/mips/mips_malta.c | 29 +++++++++++++++++++++++------ > > 1 file changed, 23 insertions(+), 6 deletions(-) > > > > diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c > > index 6e7ba9235d..4267958f35 100644 > > --- a/hw/mips/mips_malta.c > > +++ b/hw/mips/mips_malta.c > > @@ -98,7 +98,8 @@ typedef struct { > > } MaltaState; > > > > static struct _loaderparams { > > - int ram_size, ram_low_size; > > + unsigned int ram_low_size; > > + ram_addr_t ram_size; > > const char *kernel_filename; > > const char *kernel_cmdline; > > const char *initrd_filename; > > @@ -1023,6 +1024,7 @@ static int64_t load_kernel(void) > > { > > int64_t kernel_entry, kernel_high, initrd_size; > > long kernel_size; > > + char mem_cmdline[128]; > > ram_addr_t initrd_offset; > > int big_endian; > > uint32_t *prom_buf; > > @@ -1099,20 +1101,33 @@ static int64_t load_kernel(void) > > prom_buf = g_malloc(prom_size); > > > > prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_filename); > > + > > + memset(&mem_cmdline[0], 0, sizeof(mem_cmdline)); > > + if (loaderparams.ram_size > 0x10000000) { > > Please use 256 * MiB. > > > + /* > > + * Always use cmdline to overwrite mem layout > > + * as kernel may reject large emesize. > > + */ > > + sprintf(&mem_cmdline[0], > > + "mem=0x10000000@0x00000000 mem=0x%" PRIx64 "@0x90000000", > > + loaderparams.ram_size - 0x10000000); > > Ditto. > > Also please use g_strdup_printf("mem=0x%" PRIx64 "@...")/g_free. > > > + } > > + > > if (initrd_size > 0) { > > prom_set(prom_buf, prom_index++, > > - "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", > > - xlate_to_kseg0(NULL, initrd_offset), > > + "%s rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", > > + &mem_cmdline[0], xlate_to_kseg0(NULL, initrd_offset), > > initrd_size, loaderparams.kernel_cmdline); > > } else { > > - prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_cmdline); > > + prom_set(prom_buf, prom_index++, "%s %s", &mem_cmdline[0], > > + loaderparams.kernel_cmdline); > > } > > > > prom_set(prom_buf, prom_index++, "memsize"); > > prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_low_size); > > > > prom_set(prom_buf, prom_index++, "ememsize"); > > - prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_size); > > + prom_set(prom_buf, prom_index++, "%lu", loaderparams.ram_size); > > > > prom_set(prom_buf, prom_index++, "modetty0"); > > prom_set(prom_buf, prom_index++, "38400n8r"); > > @@ -1253,12 +1268,14 @@ void mips_malta_init(MachineState *machine) > > /* create CPU */ > > mips_create_cpu(machine, s, &cbus_irq, &i8259_irq); > > > > - /* allocate RAM */ > > +#ifdef TARGET_MIPS32 > > + /* MIPS32 won't accept more than 2GiB RAM due to limited address space */ > > Cc'ing Paul Burton due to commit 94c2b6aff43. > > > if (ram_size > 2 * GiB) { > > error_report("Too much memory for this machine: %" PRId64 "MB," > > " maximum 2048MB", ram_size / MiB); > > This is annoying, because the CoreLV/CoreFPGA core cards only have 4 > DIMM slots for PC-100 SDRAM, and the Memory Controller of the GT–64120A > north bridge accept at most 256 MiB per SCS for address decoding, so we > have a maximum of 1 GiB on 32-bit boards. > > In 64-bit emulation we use the a 20Kc core, provided by the Core20K core > card which doesn't use the GT–64120A but the Bonito64. So the model is > incorrect... The Bonito64 indeed allow more memory. > > Maybe it is time to consider that for 64-bit targets, since we are not > modelling a Malta core board, we can name it the official 'virt' machine... > Philippe, I almost agree 100% with you wrt last three paragraphs. (in any case, I know much less than you about details of GT-64120A and Bonito64, but I trust you). The only area I have a slightly different opinion is that I believe we should never declare Malta as a virtual board, and try to be within the boundaries of physical capabilities of real boards, even if in software (QEMU) we could "enhance" some features. If we want MIPS virtual board, than we should devise a full blown virtual board, similar to what was already done for MIPS Android emulator. I really don't want some real/virtual frankenstein in QEMU upstream just because it is convenient for let's say a particular test setup. Aleksandar > > exit(1); > > } > > +#endif > > > > /* register RAM at high address where it is undisturbed by IO */ > > memory_region_add_subregion(system_memory, 0x80000000, machine->ram); > > > >
Hi Aleksandar, (+Aurelien for Debian) (+Peter regarding changing default) On 3/14/20 4:25 AM, Aleksandar Markovic wrote: > On Thu, Mar 5, 2020 at 11:18 AM Philippe Mathieu-Daudé > <philmd@redhat.com> wrote: >> >> Please post new patches as v2, and do not post them as reply to v1. >> >> On 3/3/20 1:41 AM, Jiaxun Yang wrote: >>> When malta is coupled with MIPS64 cpu which have 64bit >>> address space, it is possible to have more than 2G RAM. >>> >>> So we removed ram_size check and overwrite memory >>> layout for these targets. >>> >>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> >>> Suggested-by: Yunqiang Su <ysu@wavecomp.com> >>> -- >>> v1: Do not overwrite cmdline when we don't have highmem. >>> --- >>> hw/mips/mips_malta.c | 29 +++++++++++++++++++++++------ >>> 1 file changed, 23 insertions(+), 6 deletions(-) >>> >>> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c >>> index 6e7ba9235d..4267958f35 100644 >>> --- a/hw/mips/mips_malta.c >>> +++ b/hw/mips/mips_malta.c >>> @@ -98,7 +98,8 @@ typedef struct { >>> } MaltaState; >>> >>> static struct _loaderparams { >>> - int ram_size, ram_low_size; >>> + unsigned int ram_low_size; >>> + ram_addr_t ram_size; >>> const char *kernel_filename; >>> const char *kernel_cmdline; >>> const char *initrd_filename; >>> @@ -1023,6 +1024,7 @@ static int64_t load_kernel(void) >>> { >>> int64_t kernel_entry, kernel_high, initrd_size; >>> long kernel_size; >>> + char mem_cmdline[128]; >>> ram_addr_t initrd_offset; >>> int big_endian; >>> uint32_t *prom_buf; >>> @@ -1099,20 +1101,33 @@ static int64_t load_kernel(void) >>> prom_buf = g_malloc(prom_size); >>> >>> prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_filename); >>> + >>> + memset(&mem_cmdline[0], 0, sizeof(mem_cmdline)); >>> + if (loaderparams.ram_size > 0x10000000) { >> >> Please use 256 * MiB. >> >>> + /* >>> + * Always use cmdline to overwrite mem layout >>> + * as kernel may reject large emesize. >>> + */ >>> + sprintf(&mem_cmdline[0], >>> + "mem=0x10000000@0x00000000 mem=0x%" PRIx64 "@0x90000000", >>> + loaderparams.ram_size - 0x10000000); >> >> Ditto. >> >> Also please use g_strdup_printf("mem=0x%" PRIx64 "@...")/g_free. >> >>> + } >>> + >>> if (initrd_size > 0) { >>> prom_set(prom_buf, prom_index++, >>> - "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", >>> - xlate_to_kseg0(NULL, initrd_offset), >>> + "%s rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", >>> + &mem_cmdline[0], xlate_to_kseg0(NULL, initrd_offset), >>> initrd_size, loaderparams.kernel_cmdline); >>> } else { >>> - prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_cmdline); >>> + prom_set(prom_buf, prom_index++, "%s %s", &mem_cmdline[0], >>> + loaderparams.kernel_cmdline); >>> } >>> >>> prom_set(prom_buf, prom_index++, "memsize"); >>> prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_low_size); >>> >>> prom_set(prom_buf, prom_index++, "ememsize"); >>> - prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_size); >>> + prom_set(prom_buf, prom_index++, "%lu", loaderparams.ram_size); >>> >>> prom_set(prom_buf, prom_index++, "modetty0"); >>> prom_set(prom_buf, prom_index++, "38400n8r"); >>> @@ -1253,12 +1268,14 @@ void mips_malta_init(MachineState *machine) >>> /* create CPU */ >>> mips_create_cpu(machine, s, &cbus_irq, &i8259_irq); >>> >>> - /* allocate RAM */ >>> +#ifdef TARGET_MIPS32 >>> + /* MIPS32 won't accept more than 2GiB RAM due to limited address space */ >> >> Cc'ing Paul Burton due to commit 94c2b6aff43. >> >>> if (ram_size > 2 * GiB) { >>> error_report("Too much memory for this machine: %" PRId64 "MB," >>> " maximum 2048MB", ram_size / MiB); >> >> This is annoying, because the CoreLV/CoreFPGA core cards only have 4 >> DIMM slots for PC-100 SDRAM, and the Memory Controller of the GT–64120A >> north bridge accept at most 256 MiB per SCS for address decoding, so we >> have a maximum of 1 GiB on 32-bit boards. >> >> In 64-bit emulation we use the a 20Kc core, provided by the Core20K core >> card which doesn't use the GT–64120A but the Bonito64. So the model is >> incorrect... The Bonito64 indeed allow more memory. >> >> Maybe it is time to consider that for 64-bit targets, since we are not >> modelling a Malta core board, we can name it the official 'virt' machine... >> > > Philippe, I almost agree 100% with you wrt last three paragraphs. > (in any case, I know much less than you about details of GT-64120A > and Bonito64, but I trust you). > > The only area I have a slightly different opinion is that I believe we > should never declare Malta as a virtual board, and try to be within the > boundaries of physical capabilities of real boards, even if in software > (QEMU) we could "enhance" some features. > > If we want MIPS virtual board, than we should devise a full blown > virtual board, similar to what was already done for MIPS Android > emulator. I really don't want some real/virtual frankenstein in QEMU > upstream just because it is convenient for let's say a particular > test setup. IIUC today all distributions supporting MIPS ports are building their MIPS packages on QEMU instances because it is faster than the native MIPS hardware they have. Since one (or two?) years, some binaries (Linux kernel? QEMU?) are failing to link because the amount of guest memory is restricted to 2GB (probably advance of linker techniques, now linkers use more memory). YunQiang, is this why you suggested this change? See: - https://www.mail-archive.com/debian-mips@lists.debian.org/msg10912.html - https://alioth-lists.debian.net/pipermail/pkg-rust-maintainers/2019-January/004844.html I believe most of the QEMU Malta board users don't care it is a Malta board, they only care it is a fast emulated MIPS machine. Unfortunately it is the default board. However 32-bit MIPS port is being dropped on Debian: https://lists.debian.org/debian-mips/2019/07/msg00010.html Maybe we can sync with the Malta users, ask them to switch to the Boston machines to build 64-bit packages, then later reduce the Malta board to 1GB. (The Boston board is more recent, but was not available at the time users started to use QEMU to build 64-bit packages). Might it be easier starting introducing a malta-5.0 machine restricted to 1GB? > > Aleksandar > >>> exit(1); >>> } >>> +#endif >>> >>> /* register RAM at high address where it is undisturbed by IO */ >>> memory_region_add_subregion(system_memory, 0x80000000, machine->ram); >>> >> >> >
---- 在 星期六, 2020-03-14 17:09:08 Philippe Mathieu-Daudé <philmd@redhat.com> 撰写 ---- > Hi Aleksandar, > > >> > >> This is annoying, because the CoreLV/CoreFPGA core cards only have 4 > >> DIMM slots for PC-100 SDRAM, and the Memory Controller of the GT–64120A > >> north bridge accept at most 256 MiB per SCS for address decoding, so we > >> have a maximum of 1 GiB on 32-bit boards. > >> > >> In 64-bit emulation we use the a 20Kc core, provided by the Core20K core > >> card which doesn't use the GT–64120A but the Bonito64. So the model is > >> incorrect... The Bonito64 indeed allow more memory. > >> > >> Maybe it is time to consider that for 64-bit targets, since we are not > >> modelling a Malta core board, we can name it the official 'virt' machine... > >> > > > > Philippe, I almost agree 100% with you wrt last three paragraphs. > > (in any case, I know much less than you about details of GT-64120A > > and Bonito64, but I trust you). > > > > The only area I have a slightly different opinion is that I believe we > > should never declare Malta as a virtual board, and try to be within the > > boundaries of physical capabilities of real boards, even if in software > > (QEMU) we could "enhance" some features. > > > > If we want MIPS virtual board, than we should devise a full blown > > virtual board, similar to what was already done for MIPS Android > > emulator. I really don't want some real/virtual frankenstein in QEMU > > upstream just because it is convenient for let's say a particular > > test setup. So probably it's time to work on a "virt" machine. What style would you prefer? PC-like or SoC style? In fact we've got two pseudo board (mips, mipssim) for MIPS, but non of them seems modern enough. I can launch a Loongson-3 style board after dealing with Kernel code clean-up. > > IIUC today all distributions supporting MIPS ports are building their > MIPS packages on QEMU instances because it is faster than the native > MIPS hardware they have. > > Since one (or two?) years, some binaries (Linux kernel? QEMU?) are > failing to link because the amount of guest memory is restricted to 2GB > (probably advance of linker techniques, now linkers use more memory). > > YunQiang, is this why you suggested this change? > > See: > - https://www.mail-archive.com/debian-mips@lists.debian.org/msg10912.html > - > https://alioth-lists.debian.net/pipermail/pkg-rust-maintainers/2019-January/004844.html > > I believe most of the QEMU Malta board users don't care it is a Malta > board, they only care it is a fast emulated MIPS machine. > Unfortunately it is the default board. Yeah. That's the truth. > > However 32-bit MIPS port is being dropped on Debian: > https://lists.debian.org/debian-mips/2019/07/msg00010.html mipsel (MIPS 32-bit Little Endian) is still alive. I believe Debian won't give up it as long as i386 still exist. > > Maybe we can sync with the Malta users, ask them to switch to the Boston > machines to build 64-bit packages, then later reduce the Malta board to 1GB. > (The Boston board is more recent, but was not available at the time > users started to use QEMU to build 64-bit packages). > > Might it be easier starting introducing a malta-5.0 machine restricted > to 1GB? > > > > > Aleksandar > > > >>> exit(1); > >>> } > >>> +#endif > >>> > >>> /* register RAM at high address where it is undisturbed by IO */ > >>> memory_region_add_subregion(system_memory, 0x80000000, machine->ram); > >>> > >> > >> > > > > -- Jiaxun Yang
On Sat, Mar 14, 2020 at 1:28 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote: > > > > ---- 在 星期六, 2020-03-14 17:09:08 Philippe Mathieu-Daudé <philmd@redhat.com> 撰写 ---- > > Hi Aleksandar, > > > > > >> > > >> This is annoying, because the CoreLV/CoreFPGA core cards only have 4 > > >> DIMM slots for PC-100 SDRAM, and the Memory Controller of the GT–64120A > > >> north bridge accept at most 256 MiB per SCS for address decoding, so we > > >> have a maximum of 1 GiB on 32-bit boards. > > >> > > >> In 64-bit emulation we use the a 20Kc core, provided by the Core20K core > > >> card which doesn't use the GT–64120A but the Bonito64. So the model is > > >> incorrect... The Bonito64 indeed allow more memory. > > >> > > >> Maybe it is time to consider that for 64-bit targets, since we are not > > >> modelling a Malta core board, we can name it the official 'virt' machine... > > >> > > > > > > Philippe, I almost agree 100% with you wrt last three paragraphs. > > > (in any case, I know much less than you about details of GT-64120A > > > and Bonito64, but I trust you). > > > > > > The only area I have a slightly different opinion is that I believe we > > > should never declare Malta as a virtual board, and try to be within the > > > boundaries of physical capabilities of real boards, even if in software > > > (QEMU) we could "enhance" some features. > > > > > > If we want MIPS virtual board, than we should devise a full blown > > > virtual board, similar to what was already done for MIPS Android > > > emulator. I really don't want some real/virtual frankenstein in QEMU > > > upstream just because it is convenient for let's say a particular > > > test setup. > > So probably it's time to work on a "virt" machine. What style would you prefer? > PC-like or SoC style? > It is time, agreed. Let's explore multiple alternatives, analyze pros and cons, and not rush into conclusions. There are several important factors to take into account: presence of kernel and QEMU support for involved devices, target users, other virtual machines in QEMU, relation to the general QEMU architecture, available time resources, etc. > In fact we've got two pseudo board (mips, mipssim) for MIPS, > but non of them seems modern enough. > They are terribly outdated, true. > I can launch a Loongson-3 style board after dealing with Kernel code clean-up. > Absolutely! You would be welcomed. Yours, Aleksandar > > > > IIUC today all distributions supporting MIPS ports are building their > > MIPS packages on QEMU instances because it is faster than the native > > MIPS hardware they have. > > > > Since one (or two?) years, some binaries (Linux kernel? QEMU?) are > > failing to link because the amount of guest memory is restricted to 2GB > > (probably advance of linker techniques, now linkers use more memory). > > > > YunQiang, is this why you suggested this change? > > > > See: > > - https://www.mail-archive.com/debian-mips@lists.debian.org/msg10912.html > > - > > https://alioth-lists.debian.net/pipermail/pkg-rust-maintainers/2019-January/004844.html > > > > I believe most of the QEMU Malta board users don't care it is a Malta > > board, they only care it is a fast emulated MIPS machine. > > Unfortunately it is the default board. > > Yeah. That's the truth. > > > > > However 32-bit MIPS port is being dropped on Debian: > > https://lists.debian.org/debian-mips/2019/07/msg00010.html > > mipsel (MIPS 32-bit Little Endian) is still alive. I believe Debian won't give up it as long as i386 > still exist. > > > > > Maybe we can sync with the Malta users, ask them to switch to the Boston > > machines to build 64-bit packages, then later reduce the Malta board to 1GB. > > (The Boston board is more recent, but was not available at the time > > users started to use QEMU to build 64-bit packages). > > > > Might it be easier starting introducing a malta-5.0 machine restricted > > to 1GB? > > > > > > > > Aleksandar > > > > > >>> exit(1); > > >>> } > > >>> +#endif > > >>> > > >>> /* register RAM at high address where it is undisturbed by IO */ > > >>> memory_region_add_subregion(system_memory, 0x80000000, machine->ram); > > >>> > > >> > > >> > > > > > > > > > > -- > Jiaxun Yang >
Hi, Sorry for the delay, I just want to give some more details about the Debian. On 2020-03-14 10:09, Philippe Mathieu-Daudé wrote: > IIUC today all distributions supporting MIPS ports are building their MIPS > packages on QEMU instances because it is faster than the native MIPS > hardware they have. Actually Debian requires that packages are built on real hardware. We have a mix of Loongson 3 and Octeon 3 based build daemons. They all have 8GiB of RAM. > Since one (or two?) years, some binaries (Linux kernel? QEMU?) are failing > to link because the amount of guest memory is restricted to 2GB (probably > advance of linker techniques, now linkers use more memory). The problem happens with big packages (e.g. ceph which is a dependency of QEMU). The problem is not the physical memory issue, but the virtual address space, which is limited to 2GB for 32-bit processes. That's why we do not have the issue for the 64-bit ports. > YunQiang, is this why you suggested this change? > > See: > - https://www.mail-archive.com/debian-mips@lists.debian.org/msg10912.html > - https://alioth-lists.debian.net/pipermail/pkg-rust-maintainers/2019-January/004844.html > > I believe most of the QEMU Malta board users don't care it is a Malta board, > they only care it is a fast emulated MIPS machine. > Unfortunately it is the default board. > > However 32-bit MIPS port is being dropped on Debian: > https://lists.debian.org/debian-mips/2019/07/msg00010.html The 32-bit big endian port has been dropped after the Buster (10) release and won't be available for the Bullseye release (11). The 32-bit little endian port is still available, but it's difficult to keep it alive given the 2GB limit. > Maybe we can sync with the Malta users, ask them to switch to the Boston > machines to build 64-bit packages, then later reduce the Malta board to 1GB. > (The Boston board is more recent, but was not available at the time users > started to use QEMU to build 64-bit packages). > > Might it be easier starting introducing a malta-5.0 machine restricted to > 1GB? In any case having an easy way to simulate machines with more than 2GB of RAM in QEMU would be great. Cheers, Aurelien
On 3/23/20 5:35 PM, Aurelien Jarno wrote: > Hi, > > Sorry for the delay, I just want to give some more details about the > Debian. > > On 2020-03-14 10:09, Philippe Mathieu-Daudé wrote: >> IIUC today all distributions supporting MIPS ports are building their MIPS >> packages on QEMU instances because it is faster than the native MIPS >> hardware they have. > > Actually Debian requires that packages are built on real hardware. We > have a mix of Loongson 3 and Octeon 3 based build daemons. They all have > 8GiB of RAM. > >> Since one (or two?) years, some binaries (Linux kernel? QEMU?) are failing >> to link because the amount of guest memory is restricted to 2GB (probably >> advance of linker techniques, now linkers use more memory). > > The problem happens with big packages (e.g. ceph which is a dependency > of QEMU). The problem is not the physical memory issue, but the virtual > address space, which is limited to 2GB for 32-bit processes. That's why > we do not have the issue for the 64-bit ports. > >> YunQiang, is this why you suggested this change? >> >> See: >> - https://www.mail-archive.com/debian-mips@lists.debian.org/msg10912.html >> - https://alioth-lists.debian.net/pipermail/pkg-rust-maintainers/2019-January/004844.html >> >> I believe most of the QEMU Malta board users don't care it is a Malta board, >> they only care it is a fast emulated MIPS machine. >> Unfortunately it is the default board. >> >> However 32-bit MIPS port is being dropped on Debian: >> https://lists.debian.org/debian-mips/2019/07/msg00010.html > > The 32-bit big endian port has been dropped after the Buster (10) > release and won't be available for the Bullseye release (11). The > 32-bit little endian port is still available, but it's difficult to keep > it alive given the 2GB limit. > >> Maybe we can sync with the Malta users, ask them to switch to the Boston >> machines to build 64-bit packages, then later reduce the Malta board to 1GB. >> (The Boston board is more recent, but was not available at the time users >> started to use QEMU to build 64-bit packages). >> >> Might it be easier starting introducing a malta-5.0 machine restricted to >> 1GB? > > In any case having an easy way to simulate machines with more than 2GB > of RAM in QEMU would be great. You mean on MIPS64, right? I see the Boston is limited to 1/2GB, probably due to code started copy/pasted on the Malta. I don't know (without having to refer to datasheets) the maximum amount of DRAM the Boston board can handle, but it should be more than 2GB. > > Cheers, > Aurelien >
18:38 Pon, 23.03.2020. Aurelien Jarno <aurelien@aurel32.net> је написао/ла: > > Hi, > > Sorry for the delay, I just want to give some more details about the > Debian. > > On 2020-03-14 10:09, Philippe Mathieu-Daudé wrote: > > IIUC today all distributions supporting MIPS ports are building their MIPS > > packages on QEMU instances because it is faster than the native MIPS > > hardware they have. > > Actually Debian requires that packages are built on real hardware. We > have a mix of Loongson 3 and Octeon 3 based build daemons. They all have > 8GiB of RAM. > > > Since one (or two?) years, some binaries (Linux kernel? QEMU?) are failing > > to link because the amount of guest memory is restricted to 2GB (probably > > advance of linker techniques, now linkers use more memory). > > The problem happens with big packages (e.g. ceph which is a dependency > of QEMU). The problem is not the physical memory issue, but the virtual > address space, which is limited to 2GB for 32-bit processes. That's why > we do not have the issue for the 64-bit ports. > > > YunQiang, is this why you suggested this change? > > > > See: > > - https://www.mail-archive.com/debian-mips@lists.debian.org/msg10912.html > > - https://alioth-lists.debian.net/pipermail/pkg-rust-maintainers/2019-January/004844.html > > > > I believe most of the QEMU Malta board users don't care it is a Malta board, > > they only care it is a fast emulated MIPS machine. > > Unfortunately it is the default board. > > > > However 32-bit MIPS port is being dropped on Debian: > > https://lists.debian.org/debian-mips/2019/07/msg00010.html > > The 32-bit big endian port has been dropped after the Buster (10) > release and won't be available for the Bullseye release (11). The > 32-bit little endian port is still available, but it's difficult to keep > it alive given the 2GB limit. > > > Maybe we can sync with the Malta users, ask them to switch to the Boston > > machines to build 64-bit packages, then later reduce the Malta board to 1GB. > > (The Boston board is more recent, but was not available at the time users > > started to use QEMU to build 64-bit packages). > > > > Might it be easier starting introducing a malta-5.0 machine restricted to > > 1GB? > > In any case having an easy way to simulate machines with more than 2GB > of RAM in QEMU would be great. > In my company, we do have both Octeon (don't know at this moment what version) and Boston systems. Boston seems to me as a very good candidate for enabling RAM > 2GB. I never saw it phisically, since it is assigned to a different department, but just anectodaly I heard that it is designed as a desktop (or even server) machine, and, therefore, it almost certainly supports > 2GB. Given current circumstances of remote work for most of us, and limited movement, it may be somewhat difficult for me to access it, but it is not imposible. Please take everything I said in this email with a grain of salt, since it is based more on hallway chats, rather than on facts. I'll try to get more info, hopefully soon. Yours, Aleksandar > Cheers, > Aurelien > > -- > Aurelien Jarno GPG: 4096R/1DDD8C9B > aurelien@aurel32.net http://www.aurel32.net >
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 6e7ba9235d..4267958f35 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -98,7 +98,8 @@ typedef struct { } MaltaState; static struct _loaderparams { - int ram_size, ram_low_size; + unsigned int ram_low_size; + ram_addr_t ram_size; const char *kernel_filename; const char *kernel_cmdline; const char *initrd_filename; @@ -1023,6 +1024,7 @@ static int64_t load_kernel(void) { int64_t kernel_entry, kernel_high, initrd_size; long kernel_size; + char mem_cmdline[128]; ram_addr_t initrd_offset; int big_endian; uint32_t *prom_buf; @@ -1099,20 +1101,33 @@ static int64_t load_kernel(void) prom_buf = g_malloc(prom_size); prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_filename); + + memset(&mem_cmdline[0], 0, sizeof(mem_cmdline)); + if (loaderparams.ram_size > 0x10000000) { + /* + * Always use cmdline to overwrite mem layout + * as kernel may reject large emesize. + */ + sprintf(&mem_cmdline[0], + "mem=0x10000000@0x00000000 mem=0x%" PRIx64 "@0x90000000", + loaderparams.ram_size - 0x10000000); + } + if (initrd_size > 0) { prom_set(prom_buf, prom_index++, - "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", - xlate_to_kseg0(NULL, initrd_offset), + "%s rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", + &mem_cmdline[0], xlate_to_kseg0(NULL, initrd_offset), initrd_size, loaderparams.kernel_cmdline); } else { - prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_cmdline); + prom_set(prom_buf, prom_index++, "%s %s", &mem_cmdline[0], + loaderparams.kernel_cmdline); } prom_set(prom_buf, prom_index++, "memsize"); prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_low_size); prom_set(prom_buf, prom_index++, "ememsize"); - prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_size); + prom_set(prom_buf, prom_index++, "%lu", loaderparams.ram_size); prom_set(prom_buf, prom_index++, "modetty0"); prom_set(prom_buf, prom_index++, "38400n8r"); @@ -1253,12 +1268,14 @@ void mips_malta_init(MachineState *machine) /* create CPU */ mips_create_cpu(machine, s, &cbus_irq, &i8259_irq); - /* allocate RAM */ +#ifdef TARGET_MIPS32 + /* MIPS32 won't accept more than 2GiB RAM due to limited address space */ if (ram_size > 2 * GiB) { error_report("Too much memory for this machine: %" PRId64 "MB," " maximum 2048MB", ram_size / MiB); exit(1); } +#endif /* register RAM at high address where it is undisturbed by IO */ memory_region_add_subregion(system_memory, 0x80000000, machine->ram);
When malta is coupled with MIPS64 cpu which have 64bit address space, it is possible to have more than 2G RAM. So we removed ram_size check and overwrite memory layout for these targets. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Suggested-by: Yunqiang Su <ysu@wavecomp.com> -- v1: Do not overwrite cmdline when we don't have highmem. --- hw/mips/mips_malta.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-)