[for-5.0,v1] target/mips: Fix loongson multimedia condition instructions

Commit Message

Jiaxun Yang March 24, 2020, 12:22 p.m. UTC

Loongson multimedia condition instructions were previously implemented as
write 0 to rd due to lack of documentation. So I just confirmed with Loongson
about their encoding and implemented them correctly.

Signed-off-by: Jiaxun Yang <[e-mail]>
Acked-by: Huacai Chen <[e-mail]>
---
v1: Use deposit opreations according to Richard's suggestion.
---
 target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
 1 file changed, 31 insertions(+), 4 deletions(-)

Comments

Richard Henderson March 24, 2020, 2:59 p.m. UTC | #1

On 3/24/20 5:22 AM, Jiaxun Yang wrote:
> Loongson multimedia condition instructions were previously implemented as
> write 0 to rd due to lack of documentation. So I just confirmed with Loongson
> about their encoding and implemented them correctly.
> 
> Signed-off-by: Jiaxun Yang <[e-mail]>
> Acked-by: Huacai Chen <[e-mail]>
> ---
> v1: Use deposit opreations according to Richard's suggestion.
> ---
>  target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
>  1 file changed, 31 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <[e-mail]>


r~

Aleksandar Markovic March 24, 2020, 4:56 p.m. UTC | #2

14:23 Uto, 24.03.2020. Jiaxun Yang <[e-mail]> је написао/ла:
>
> Loongson multimedia condition instructions were previously implemented as
> write 0 to rd due to lack of documentation. So I just confirmed with
Loongson
> about their encoding and implemented them correctly.
>
> Signed-off-by: Jiaxun Yang <[e-mail]>
> Acked-by: Huacai Chen <[e-mail]>
> ---
> v1: Use deposit opreations according to Richard's suggestion.
> ---

Thanks, Jiaxun!

But, your numeration of patches is wrong. The first version of the patch
should be sent with prefix [PATCH]
and the second (this) version of the patch with prefix [PATCH v2]. This is
the second time you make the same mistake. Please make sure that you have
the correct numeration in future. But, anyhow, thanks for this version.

Yours,
Aleksandar

>  target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
>  1 file changed, 31 insertions(+), 4 deletions(-)
>
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index d745bd2803..25b595a17d 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -5529,6 +5529,7 @@ static void gen_loongson_multimedia(DisasContext
*ctx, int rd, int rs, int rt)
>  {
>      uint32_t opc, shift_max;
>      TCGv_i64 t0, t1;
> +    TCGCond cond;
>
>      opc = MASK_LMI(ctx->opcode);
>      switch (opc) {
> @@ -5862,14 +5863,39 @@ static void gen_loongson_multimedia(DisasContext
*ctx, int rd, int rs, int rt)
>
>      case OPC_SEQU_CP2:
>      case OPC_SEQ_CP2:
> +        cond = TCG_COND_EQ;
> +        goto do_cc_cond;
> +        break;
>      case OPC_SLTU_CP2:
> +        cond = TCG_COND_LTU;
> +        goto do_cc_cond;
> +        break;
>      case OPC_SLT_CP2:
> +        cond = TCG_COND_LT;
> +        goto do_cc_cond;
> +        break;
>      case OPC_SLEU_CP2:
> +        cond = TCG_COND_LEU;
> +        goto do_cc_cond;
> +        break;
>      case OPC_SLE_CP2:
> -        /*
> -         * ??? Document is unclear: Set FCC[CC].  Does that mean the
> -         * FD field is the CC field?
> -         */
> +        cond = TCG_COND_LE;
> +    do_cc_cond:
> +        {
> +            int cc = (ctx->opcode >> 8) & 0x7;
> +            TCGv_i64 t64 = tcg_temp_new_i64();
> +            TCGv_i32 t32 = tcg_temp_new_i32();
> +
> +            tcg_gen_setcond_i64(cond, t64, t0, t1);
> +            tcg_gen_extrl_i64_i32(t32, t64);
> +            tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32,
> +                                get_fp_bit(cc), 1);
> +
> +            tcg_temp_free_i32(t32);
> +            tcg_temp_free_i64(t64);
> +        }
> +        goto no_rd;
> +        break;
>      default:
>          MIPS_INVAL("loongson_cp2");
>          generate_exception_end(ctx, EXCP_RI);
> @@ -5878,6 +5904,7 @@ static void gen_loongson_multimedia(DisasContext
*ctx, int rd, int rs, int rt)
>
>      gen_store_fpr64(ctx, t0, rd);
>
> +no_rd:
>      tcg_temp_free_i64(t0);
>      tcg_temp_free_i64(t1);
>  }
> --
> 2.26.0.rc2
>
>

Jiaxun Yang March 24, 2020, 5:08 p.m. UTC | #3

于 2020年3月25日 GMT+08:00 上午12:56:41, Aleksandar Markovic <[e-mail]> 写到:
>14:23 Uto, 24.03.2020. Jiaxun Yang <[e-mail]> је
>написао/ла:
>>
>> Loongson multimedia condition instructions were previously
>implemented as
>> write 0 to rd due to lack of documentation. So I just confirmed with
>Loongson
>> about their encoding and implemented them correctly.
>>
>> Signed-off-by: Jiaxun Yang <[e-mail]>
>> Acked-by: Huacai Chen <[e-mail]>
>> ---
>> v1: Use deposit opreations according to Richard's suggestion.
>> ---
>
>Thanks, Jiaxun!
>
>But, your numeration of patches is wrong. The first version of the
>patch
>should be sent with prefix [PATCH]
>and the second (this) version of the patch with prefix [PATCH v2]. This
>is
>the second time you make the same mistake. Please make sure that you
>have
>the correct numeration in future. But, anyhow, thanks for this version.

Sorry for that.
I'm doing like this for years.
I promise it won't happen in future.

Thanks.

>
>Yours,
>Aleksandar
>

Aleksandar Markovic March 24, 2020, 5:26 p.m. UTC | #4

19:09 Uto, 24.03.2020. Jiaxun Yang <[e-mail]> је написао/ла:
>
>
>
> 于 2020年3月25日 GMT+08:00 上午12:56:41, Aleksandar Markovic <
[e-mail]> 写到:
> >14:23 Uto, 24.03.2020. Jiaxun Yang <[e-mail]> је
> >написао/ла:
> >>
> >> Loongson multimedia condition instructions were previously
> >implemented as
> >> write 0 to rd due to lack of documentation. So I just confirmed with
> >Loongson
> >> about their encoding and implemented them correctly.
> >>
> >> Signed-off-by: Jiaxun Yang <[e-mail]>
> >> Acked-by: Huacai Chen <[e-mail]>
> >> ---
> >> v1: Use deposit opreations according to Richard's suggestion.
> >> ---
> >
> >Thanks, Jiaxun!
> >
> >But, your numeration of patches is wrong. The first version of the
> >patch
> >should be sent with prefix [PATCH]
> >and the second (this) version of the patch with prefix [PATCH v2]. This
> >is
> >the second time you make the same mistake. Please make sure that you
> >have
> >the correct numeration in future. But, anyhow, thanks for this version.
>
> Sorry for that.
> I'm doing like this for years.
> I promise it won't happen in future.
>

Cool, thanks again!

> Thanks.
>
> >
> >Yours,
> >Aleksandar
> >
> --
> Jiaxun Yang

Aleksandar Markovic March 25, 2020, 10:44 a.m. UTC | #5

16:59 Uto, 24.03.2020. Richard Henderson <[e-mail]> је
написао/ла:
>
> On 3/24/20 5:22 AM, Jiaxun Yang wrote:
> > Loongson multimedia condition instructions were previously implemented
as
> > write 0 to rd due to lack of documentation. So I just confirmed with
Loongson
> > about their encoding and implemented them correctly.
> >
> > Signed-off-by: Jiaxun Yang <[e-mail]>
> > Acked-by: Huacai Chen <[e-mail]>
> > ---
> > v1: Use deposit opreations according to Richard's suggestion.
> > ---
> >  target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
> >  1 file changed, 31 insertions(+), 4 deletions(-)
>
> Reviewed-by: Richard Henderson <[e-mail]>
>

I just have a couple of mon-essential suggestions wrt coding style, but
since all that is really of very insignificant nauture, I wouldn't even
mention them.

Reviewed-by: Aleksandar Markovic <[e-mail]>

May I ask you, Richard, to select this patch for your next TCG-for-5.0
queue, so that I don't go through a MIPS queue process for just a single
patch?

Thanks to all involved people!

Aleksandar

>
> r~

Aleksandar Markovic March 25, 2020, 10:47 a.m. UTC | #6

12:44 Sre, 25.03.2020. Aleksandar Markovic <[e-mail]>
је написао/ла:
>
> 16:59 Uto, 24.03.2020. Richard Henderson <[e-mail]>
је написао/ла:
> >
> > On 3/24/20 5:22 AM, Jiaxun Yang wrote:
> > > Loongson multimedia condition instructions were previously
implemented as
> > > write 0 to rd due to lack of documentation. So I just confirmed with
Loongson
> > > about their encoding and implemented them correctly.
> > >
> > > Signed-off-by: Jiaxun Yang <[e-mail]>
> > > Acked-by: Huacai Chen <[e-mail]>
> > > ---
> > > v1: Use deposit opreations according to Richard's suggestion.
> > > ---
> > >  target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
> > >  1 file changed, 31 insertions(+), 4 deletions(-)
> >
> > Reviewed-by: Richard Henderson <[e-mail]>
> >
>
> I just have a couple of mon-essential suggestions wrt coding style, but
since all that is really of very insignificant nauture, I wouldn't even
mention them.
>
> Reviewed-by: Aleksandar Markovic <[e-mail]>
>

Sorry, there was a typo. It should be:

Reviewed-by: Aleksandar Markovic <aleksandar.qem [e-mail]>

("u" instead of "i" in "qemi")

> May I ask you, Richard, to select this patch for your next TCG-for-5.0
queue, so that I don't go through a MIPS queue process for just a single
patch?
>
> Thanks to all involved people!
>
> Aleksandar
>
> >
> > r~

Aleksandar Markovic March 25, 2020, 11:13 a.m. UTC | #7

12:47 Sre, 25.03.2020. Aleksandar Markovic <[e-mail]>
је написао/ла:
>
> 12:44 Sre, 25.03.2020. Aleksandar Markovic <
[e-mail]> је написао/ла:
> >
> > 16:59 Uto, 24.03.2020. Richard Henderson <[e-mail]>
је написао/ла:
> > >
> > > On 3/24/20 5:22 AM, Jiaxun Yang wrote:
> > > > Loongson multimedia condition instructions were previously
implemented as
> > > > write 0 to rd due to lack of documentation. So I just confirmed
with Loongson
> > > > about their encoding and implemented them correctly.
> > > >
> > > > Signed-off-by: Jiaxun Yang <[e-mail]>
> > > > Acked-by: Huacai Chen <[e-mail]>
> > > > ---
> > > > v1: Use deposit opreations according to Richard's suggestion.
> > > > ---
> > > >  target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
> > > >  1 file changed, 31 insertions(+), 4 deletions(-)
> > >
> > > Reviewed-by: Richard Henderson <[e-mail]>
> > >
> >
> > I just have a couple of mon-essential suggestions wrt coding style, but
since all that is really of very insignificant nauture, I wouldn't even
mention them.
> >
> > Reviewed-by: Aleksandar Markovic <[e-mail]>
> >
>
> Sorry, there was a typo. It should be:
>
> Reviewed-by: Aleksandar Markovic <aleksandar.qem [e-mail]>
>
> ("u" instead of "i" in "qemi")
>

Another problem with text formatting on mobile phones, this line should be:

Reviewed-by: Aleksandar Markovic <[e-mail]>

Hope this all right now.

Sorry about that.

> > May I ask you, Richard, to select this patch for your next TCG-for-5.0
queue, so that I don't go through a MIPS queue process for just a single
patch?
> >
> > Thanks to all involved people!
> >
> > Aleksandar
> >
> > >
> > > r~

Richard Henderson March 26, 2020, 1:30 a.m. UTC | #8

On 3/25/20 3:44 AM, Aleksandar Markovic wrote:
> May I ask you, Richard, to select this patch for your next TCG-for-5.0 queue,
> so that I don't go through a MIPS queue process for just a single patch?
> 

I suppose I could, but at present I have nothing in the tcg queue, so it would
be just the single patch.


r~

Aleksandar Markovic March 27, 2020, 12:46 p.m. UTC | #9

03:30 Čet, 26.03.2020. Richard Henderson <[e-mail]> је
написао/ла:
>
> On 3/25/20 3:44 AM, Aleksandar Markovic wrote:
> > May I ask you, Richard, to select this patch for your next TCG-for-5.0
queue,
> > so that I don't go through a MIPS queue process for just a single patch?
> >
>
> I suppose I could, but at present I have nothing in the tcg queue, so it
would
> be just the single patch.
>

Yes, Richard, even if it is just a single pending patch to you at the
moment, I would prefer you sending the pull request - in a way it
represents the final completion touch of LMI module that was authored by
you, but unclear docs prevented us from getting these last bits and pieces.
Please go ahead with the pull request at any time convenient to you - at
least it symbolically belongs to you (and I am sure you are glad about the
patch).

Yours, Aleksansar

>
> r~

Philippe Mathieu-Daudé March 30, 2020, 3:39 p.m. UTC | #10

Hi Jiaxun Yang,

On 3/24/20 1:22 PM, Jiaxun Yang wrote:
> Loongson multimedia condition instructions were previously implemented as
> write 0 to rd due to lack of documentation. So I just confirmed with Loongson
> about their encoding and implemented them correctly.

If you have a binary using loongson multimedia instructions, can you add 
a test? So this code won't bitrot.

I'm in particular interested by a test covering the MAC2008 
instructions. You can look at examples in the tests/tcg/mips/ directory, 
Aleksandar added a lot of tests there.

Thanks,

Phil.

> 
> Signed-off-by: Jiaxun Yang <[e-mail]>
> Acked-by: Huacai Chen <[e-mail]>
> ---
> v1: Use deposit opreations according to Richard's suggestion.
> ---
>   target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
>   1 file changed, 31 insertions(+), 4 deletions(-)
> 
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index d745bd2803..25b595a17d 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -5529,6 +5529,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>   {
>       uint32_t opc, shift_max;
>       TCGv_i64 t0, t1;
> +    TCGCond cond;
>   
>       opc = MASK_LMI(ctx->opcode);
>       switch (opc) {
> @@ -5862,14 +5863,39 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>   
>       case OPC_SEQU_CP2:
>       case OPC_SEQ_CP2:
> +        cond = TCG_COND_EQ;
> +        goto do_cc_cond;
> +        break;
>       case OPC_SLTU_CP2:
> +        cond = TCG_COND_LTU;
> +        goto do_cc_cond;
> +        break;
>       case OPC_SLT_CP2:
> +        cond = TCG_COND_LT;
> +        goto do_cc_cond;
> +        break;
>       case OPC_SLEU_CP2:
> +        cond = TCG_COND_LEU;
> +        goto do_cc_cond;
> +        break;
>       case OPC_SLE_CP2:
> -        /*
> -         * ??? Document is unclear: Set FCC[CC].  Does that mean the
> -         * FD field is the CC field?
> -         */
> +        cond = TCG_COND_LE;
> +    do_cc_cond:
> +        {
> +            int cc = (ctx->opcode >> 8) & 0x7;
> +            TCGv_i64 t64 = tcg_temp_new_i64();
> +            TCGv_i32 t32 = tcg_temp_new_i32();
> +
> +            tcg_gen_setcond_i64(cond, t64, t0, t1);
> +            tcg_gen_extrl_i64_i32(t32, t64);
> +            tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32,
> +                                get_fp_bit(cc), 1);
> +
> +            tcg_temp_free_i32(t32);
> +            tcg_temp_free_i64(t64);
> +        }
> +        goto no_rd;
> +        break;
>       default:
>           MIPS_INVAL("loongson_cp2");
>           generate_exception_end(ctx, EXCP_RI);
> @@ -5878,6 +5904,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>   
>       gen_store_fpr64(ctx, t0, rd);
>   
> +no_rd:
>       tcg_temp_free_i64(t0);
>       tcg_temp_free_i64(t1);
>   }
>

Jiaxun Yang March 30, 2020, 4:18 p.m. UTC | #11

于 2020年3月30日 GMT+08:00 下午11:39:44, "Philippe Mathieu-Daudé" <[e-mail]> 写到:
>Hi Jiaxun Yang,
>
>On 3/24/20 1:22 PM, Jiaxun Yang wrote:
>> Loongson multimedia condition instructions were previously
>implemented as
>> write 0 to rd due to lack of documentation. So I just confirmed with
>Loongson
>> about their encoding and implemented them correctly.
>
>If you have a binary using loongson multimedia instructions, can you
>add 
>a test? So this code won't bitrot.

I know ffmpeg uses it.
But I think that's too fat.

>
>I'm in particular interested by a test covering the MAC2008 
>instructions. You can look at examples in the tests/tcg/mips/
>directory, 
>Aleksandar added a lot of tests there.

I'm going to try that.

Thanks.

>
>Thanks,
>
>Phil.
>
>> 
>> Signed-off-by: Jiaxun Yang <[e-mail]>
>> Acked-by: Huacai Chen <[e-mail]>
>> ---
>> v1: Use deposit opreations according to Richard's suggestion.
>> ---
>>   target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
>>   1 file changed, 31 insertions(+), 4 deletions(-)
>> 
>> diff --git a/target/mips/translate.c b/target/mips/translate.c
>> index d745bd2803..25b595a17d 100644
>> --- a/target/mips/translate.c
>> +++ b/target/mips/translate.c
>> @@ -5529,6 +5529,7 @@ static void
>gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>>   {
>>       uint32_t opc, shift_max;
>>       TCGv_i64 t0, t1;
>> +    TCGCond cond;
>>   
>>       opc = MASK_LMI(ctx->opcode);
>>       switch (opc) {
>> @@ -5862,14 +5863,39 @@ static void
>gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>>   
>>       case OPC_SEQU_CP2:
>>       case OPC_SEQ_CP2:
>> +        cond = TCG_COND_EQ;
>> +        goto do_cc_cond;
>> +        break;
>>       case OPC_SLTU_CP2:
>> +        cond = TCG_COND_LTU;
>> +        goto do_cc_cond;
>> +        break;
>>       case OPC_SLT_CP2:
>> +        cond = TCG_COND_LT;
>> +        goto do_cc_cond;
>> +        break;
>>       case OPC_SLEU_CP2:
>> +        cond = TCG_COND_LEU;
>> +        goto do_cc_cond;
>> +        break;
>>       case OPC_SLE_CP2:
>> -        /*
>> -         * ??? Document is unclear: Set FCC[CC].  Does that mean the
>> -         * FD field is the CC field?
>> -         */
>> +        cond = TCG_COND_LE;
>> +    do_cc_cond:
>> +        {
>> +            int cc = (ctx->opcode >> 8) & 0x7;
>> +            TCGv_i64 t64 = tcg_temp_new_i64();
>> +            TCGv_i32 t32 = tcg_temp_new_i32();
>> +
>> +            tcg_gen_setcond_i64(cond, t64, t0, t1);
>> +            tcg_gen_extrl_i64_i32(t32, t64);
>> +            tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32,
>> +                                get_fp_bit(cc), 1);
>> +
>> +            tcg_temp_free_i32(t32);
>> +            tcg_temp_free_i64(t64);
>> +        }
>> +        goto no_rd;
>> +        break;
>>       default:
>>           MIPS_INVAL("loongson_cp2");
>>           generate_exception_end(ctx, EXCP_RI);
>> @@ -5878,6 +5904,7 @@ static void
>gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>>   
>>       gen_store_fpr64(ctx, t0, rd);
>>   
>> +no_rd:
>>       tcg_temp_free_i64(t0);
>>       tcg_temp_free_i64(t1);
>>   }
>>

Philippe Mathieu-Daudé March 30, 2020, 4:22 p.m. UTC | #12

On 3/30/20 6:18 PM, Jiaxun Yang wrote:
> 
> 
> 于 2020年3月30日 GMT+08:00 下午11:39:44, "Philippe Mathieu-Daudé" <[e-mail]> 写到:
>> Hi Jiaxun Yang,
>>
>> On 3/24/20 1:22 PM, Jiaxun Yang wrote:
>>> Loongson multimedia condition instructions were previously
>> implemented as
>>> write 0 to rd due to lack of documentation. So I just confirmed with
>> Loongson
>>> about their encoding and implemented them correctly.
>>
>> If you have a binary using loongson multimedia instructions, can you
>> add
>> a test? So this code won't bitrot.
> 
> I know ffmpeg uses it.
> But I think that's too fat.

Looks perfect to me!

It'll be simpler if you use a pre-build binary from a known distribution.

> 
>>
>> I'm in particular interested by a test covering the MAC2008
>> instructions. You can look at examples in the tests/tcg/mips/
>> directory,
>> Aleksandar added a lot of tests there.
> 
> I'm going to try that.
> 
> Thanks.
> 
>>
>> Thanks,
>>
>> Phil.
>>
>>>
>>> Signed-off-by: Jiaxun Yang <[e-mail]>
>>> Acked-by: Huacai Chen <[e-mail]>
>>> ---
>>> v1: Use deposit opreations according to Richard's suggestion.
>>> ---
>>>    target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
>>>    1 file changed, 31 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/target/mips/translate.c b/target/mips/translate.c
>>> index d745bd2803..25b595a17d 100644
>>> --- a/target/mips/translate.c
>>> +++ b/target/mips/translate.c
>>> @@ -5529,6 +5529,7 @@ static void
>> gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>>>    {
>>>        uint32_t opc, shift_max;
>>>        TCGv_i64 t0, t1;
>>> +    TCGCond cond;
>>>    
>>>        opc = MASK_LMI(ctx->opcode);
>>>        switch (opc) {
>>> @@ -5862,14 +5863,39 @@ static void
>> gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>>>    
>>>        case OPC_SEQU_CP2:
>>>        case OPC_SEQ_CP2:
>>> +        cond = TCG_COND_EQ;
>>> +        goto do_cc_cond;
>>> +        break;
>>>        case OPC_SLTU_CP2:
>>> +        cond = TCG_COND_LTU;
>>> +        goto do_cc_cond;
>>> +        break;
>>>        case OPC_SLT_CP2:
>>> +        cond = TCG_COND_LT;
>>> +        goto do_cc_cond;
>>> +        break;
>>>        case OPC_SLEU_CP2:
>>> +        cond = TCG_COND_LEU;
>>> +        goto do_cc_cond;
>>> +        break;
>>>        case OPC_SLE_CP2:
>>> -        /*
>>> -         * ??? Document is unclear: Set FCC[CC].  Does that mean the
>>> -         * FD field is the CC field?
>>> -         */
>>> +        cond = TCG_COND_LE;
>>> +    do_cc_cond:
>>> +        {
>>> +            int cc = (ctx->opcode >> 8) & 0x7;
>>> +            TCGv_i64 t64 = tcg_temp_new_i64();
>>> +            TCGv_i32 t32 = tcg_temp_new_i32();
>>> +
>>> +            tcg_gen_setcond_i64(cond, t64, t0, t1);
>>> +            tcg_gen_extrl_i64_i32(t32, t64);
>>> +            tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32,
>>> +                                get_fp_bit(cc), 1);
>>> +
>>> +            tcg_temp_free_i32(t32);
>>> +            tcg_temp_free_i64(t64);
>>> +        }
>>> +        goto no_rd;
>>> +        break;
>>>        default:
>>>            MIPS_INVAL("loongson_cp2");
>>>            generate_exception_end(ctx, EXCP_RI);
>>> @@ -5878,6 +5904,7 @@ static void
>> gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>>>    
>>>        gen_store_fpr64(ctx, t0, rd);
>>>    
>>> +no_rd:
>>>        tcg_temp_free_i64(t0);
>>>        tcg_temp_free_i64(t1);
>>>    }
>>>
>

Jiaxun Yang March 30, 2020, 4:30 p.m. UTC | #13

于 2020年3月31日 GMT+08:00 上午12:22:43, "Philippe Mathieu-Daudé" <[e-mail]> 写到:
>On 3/30/20 6:18 PM, Jiaxun Yang wrote:
>> 
>> 
>> 于 2020年3月30日 GMT+08:00 下午11:39:44, "Philippe Mathieu-Daudé"
><[e-mail]> 写到:
>>> Hi Jiaxun Yang,
>>>
>>> On 3/24/20 1:22 PM, Jiaxun Yang wrote:
>>>> Loongson multimedia condition instructions were previously
>>> implemented as
>>>> write 0 to rd due to lack of documentation. So I just confirmed
>with
>>> Loongson
>>>> about their encoding and implemented them correctly.
>>>
>>> If you have a binary using loongson multimedia instructions, can you
>>> add
>>> a test? So this code won't bitrot.
>> 
>> I know ffmpeg uses it.
>> But I think that's too fat.
>
>Looks perfect to me!
>
>It'll be simpler if you use a pre-build binary from a known
>distribution.

Unfortunately none of the distribution built ffmpeg with loongson insns enabled,
as it can't be enabled at runtime.

I'll try that after fulfill Loongson Extensions in  QEMU.

FFmpeg do use some other Loongson insns despite mmi. 

There are still 15+ instructions for me to work.

Thanks

Aleksandar Markovic March 30, 2020, 7:01 p.m. UTC | #14

18:31 Pon, 30.03.2020. Jiaxun Yang <[e-mail]> је написао/ла:
>
>
>
> 于 2020年3月31日 GMT+08:00 上午12:22:43, "Philippe Mathieu-Daudé" <
[e-mail]> 写到:
> >On 3/30/20 6:18 PM, Jiaxun Yang wrote:
> >>
> >>
> >> 于 2020年3月30日 GMT+08:00 下午11:39:44, "Philippe Mathieu-Daudé"
> ><[e-mail]> 写到:
> >>> Hi Jiaxun Yang,
> >>>
> >>> On 3/24/20 1:22 PM, Jiaxun Yang wrote:
> >>>> Loongson multimedia condition instructions were previously
> >>> implemented as
> >>>> write 0 to rd due to lack of documentation. So I just confirmed
> >with
> >>> Loongson
> >>>> about their encoding and implemented them correctly.
> >>>
> >>> If you have a binary using loongson multimedia instructions, can you
> >>> add
> >>> a test? So this code won't bitrot.
> >>
> >> I know ffmpeg uses it.
> >> But I think that's too fat.
> >
> >Looks perfect to me!
> >
> >It'll be simpler if you use a pre-build binary from a known
> >distribution.
>
> Unfortunately none of the distribution built ffmpeg with loongson insns
enabled,
> as it can't be enabled at runtime.
>
> I'll try that after fulfill Loongson Extensions in  QEMU.
>
> FFmpeg do use some other Loongson insns despite mmi.
>
> There are still 15+ instructions for me to work.
>

Jiaxun, hi.

My advice is to think about integrating Loongson-relared test into QEMU "in
background", with the intention that you possibly develop them later on.

Let's focus first on the code you want to add to enhance core
Loongson-related QEMU features, and we'll help you later on about Loongton
tests that could also be added to QEMU upstream.

I am sure you have some informal tests for all code you develop, but there
is a long way from these tests to the test that can be integrated in QEMU
upetream.

Just for reference, and something for you to think about in breaks between
real coding:

Basically, in QEMU, there are several kind of tests you could have in mind:

1) Unit tests yhat typically test emulation of just a single instruction
(see /tests/tcg/mips/user/ase/msa for example);

2) Acceptance test that test boot/shutdown and possibly other features of
virtual machines prepared in advance (kernel, rootfs, etc.), residing in
test/acceptance;

3) Tests that may use tests made for libraries and applicstions that use
the functionality of your newly-added features;

4) Other test that you may devise by your own and think are usefull and
make sense.

But again, let's focus and show us the main body of your code (as you
already started doing), let's start from there, and see how is it going and
what happens.

Thanks again for your work so far!

Yours,
Aleksandar

> Thanks
> --
> Jiaxun Yang

Aleksandar Markovic April 1, 2020, 2:36 p.m. UTC | #15

13:23 Uto, 24.03.2020. Jiaxun Yang <[e-mail]> је написао/ла:
>
> Loongson multimedia condition instructions were previously implemented as
> write 0 to rd due to lack of documentation. So I just confirmed with
Loongson
> about their encoding and implemented them correctly.
>

Hi, Jiaxun,

Richard Henderson selected your patch to be in his pull request, and the
main maintainer, Peter Maydell, accepted it and integrated it into main
tree:

https://github.com/qemu/qemu/commit/84878f4c00a7beca1d1460e2f77a6c833b8d0393#diff-b06d6b84c7a82caf0f5e4645f4b80540

I gather this is your first patch merged in QEMU upstream.

Congratulations!!

There is a place for you in QEMU community.

Hope we hear from you soon, with more fixes, improvements, and new features.

Yours,
Aleksandar

> Signed-off-by: Jiaxun Yang <[e-mail]>
> Acked-by: Huacai Chen <[e-mail]>
> ---
> v1: Use deposit opreations according to Richard's suggestion.
> ---
>  target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
>  1 file changed, 31 insertions(+), 4 deletions(-)
>
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index d745bd2803..25b595a17d 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -5529,6 +5529,7 @@ static void gen_loongson_multimedia(DisasContext
*ctx, int rd, int rs, int rt)
>  {
>      uint32_t opc, shift_max;
>      TCGv_i64 t0, t1;
> +    TCGCond cond;
>
>      opc = MASK_LMI(ctx->opcode);
>      switch (opc) {
> @@ -5862,14 +5863,39 @@ static void gen_loongson_multimedia(DisasContext
*ctx, int rd, int rs, int rt)
>
>      case OPC_SEQU_CP2:
>      case OPC_SEQ_CP2:
> +        cond = TCG_COND_EQ;
> +        goto do_cc_cond;
> +        break;
>      case OPC_SLTU_CP2:
> +        cond = TCG_COND_LTU;
> +        goto do_cc_cond;
> +        break;
>      case OPC_SLT_CP2:
> +        cond = TCG_COND_LT;
> +        goto do_cc_cond;
> +        break;
>      case OPC_SLEU_CP2:
> +        cond = TCG_COND_LEU;
> +        goto do_cc_cond;
> +        break;
>      case OPC_SLE_CP2:
> -        /*
> -         * ??? Document is unclear: Set FCC[CC].  Does that mean the
> -         * FD field is the CC field?
> -         */
> +        cond = TCG_COND_LE;
> +    do_cc_cond:
> +        {
> +            int cc = (ctx->opcode >> 8) & 0x7;
> +            TCGv_i64 t64 = tcg_temp_new_i64();
> +            TCGv_i32 t32 = tcg_temp_new_i32();
> +
> +            tcg_gen_setcond_i64(cond, t64, t0, t1);
> +            tcg_gen_extrl_i64_i32(t32, t64);
> +            tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32,
> +                                get_fp_bit(cc), 1);
> +
> +            tcg_temp_free_i32(t32);
> +            tcg_temp_free_i64(t64);
> +        }
> +        goto no_rd;
> +        break;
>      default:
>          MIPS_INVAL("loongson_cp2");
>          generate_exception_end(ctx, EXCP_RI);
> @@ -5878,6 +5904,7 @@ static void gen_loongson_multimedia(DisasContext
*ctx, int rd, int rs, int rt)
>
>      gen_store_fpr64(ctx, t0, rd);
>
> +no_rd:
>      tcg_temp_free_i64(t0);
>      tcg_temp_free_i64(t1);
>  }
> --
> 2.26.0.rc2
>
>

Patch

diff --git a/target/mips/translate.c b/target/mips/translate.c
index d745bd2803..25b595a17d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -5529,6 +5529,7 @@  static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
 {
     uint32_t opc, shift_max;
     TCGv_i64 t0, t1;
+    TCGCond cond;
 
     opc = MASK_LMI(ctx->opcode);
     switch (opc) {
@@ -5862,14 +5863,39 @@  static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
 
     case OPC_SEQU_CP2:
     case OPC_SEQ_CP2:
+        cond = TCG_COND_EQ;
+        goto do_cc_cond;
+        break;
     case OPC_SLTU_CP2:
+        cond = TCG_COND_LTU;
+        goto do_cc_cond;
+        break;
     case OPC_SLT_CP2:
+        cond = TCG_COND_LT;
+        goto do_cc_cond;
+        break;
     case OPC_SLEU_CP2:
+        cond = TCG_COND_LEU;
+        goto do_cc_cond;
+        break;
     case OPC_SLE_CP2:
-        /*
-         * ??? Document is unclear: Set FCC[CC].  Does that mean the
-         * FD field is the CC field?
-         */
+        cond = TCG_COND_LE;
+    do_cc_cond:
+        {
+            int cc = (ctx->opcode >> 8) & 0x7;
+            TCGv_i64 t64 = tcg_temp_new_i64();
+            TCGv_i32 t32 = tcg_temp_new_i32();
+
+            tcg_gen_setcond_i64(cond, t64, t0, t1);
+            tcg_gen_extrl_i64_i32(t32, t64);
+            tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32,
+                                get_fp_bit(cc), 1);
+
+            tcg_temp_free_i32(t32);
+            tcg_temp_free_i64(t64);
+        }
+        goto no_rd;
+        break;
     default:
         MIPS_INVAL("loongson_cp2");
         generate_exception_end(ctx, EXCP_RI);
@@ -5878,6 +5904,7 @@  static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
 
     gen_store_fpr64(ctx, t0, rd);
 
+no_rd:
     tcg_temp_free_i64(t0);
     tcg_temp_free_i64(t1);
 }