| Message ID | 20200313034949.3028-3-jiangyifei@huawei.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add riscv64 kvm accel support | expand |
On Fri, Mar 13, 2020 at 9:23 AM Yifei Jiang <jiangyifei@huawei.com> wrote: > > Add target/riscv/kvm.c to place kvm_arch_* function needed by kvm/kvm-all.c. > Meanwhile, add riscv64 kvm support to configure. This should be for both riscv64 and riscv32. The KVMTOOL compiles perfectly fine for riscv32 (although not tested much) so there is no harm is supporting both riscv64 and riscv32 from start itself. Regards, Anup > > Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> > Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> > --- > configure | 1 + > target/riscv/Makefile.objs | 1 + > target/riscv/kvm.c | 128 +++++++++++++++++++++++++++++++++++++ > 3 files changed, 130 insertions(+) > create mode 100644 target/riscv/kvm.c > > diff --git a/configure b/configure > index 3c7470096f..30024a8aef 100755 > --- a/configure > +++ b/configure > @@ -200,6 +200,7 @@ supported_kvm_target() { > x86_64:i386 | x86_64:x86_64 | x86_64:x32 | \ > mips:mips | mipsel:mips | \ > ppc:ppc | ppc64:ppc | ppc:ppc64 | ppc64:ppc64 | ppc64:ppc64le | \ > + riscv64:riscv64 | \ > s390x:s390x) > return 0 > ;; > diff --git a/target/riscv/Makefile.objs b/target/riscv/Makefile.objs > index ff651f69f6..7ea8f4c3da 100644 > --- a/target/riscv/Makefile.objs > +++ b/target/riscv/Makefile.objs > @@ -1,5 +1,6 @@ > obj-y += translate.o op_helper.o cpu_helper.o cpu.o csr.o fpu_helper.o gdbstub.o > obj-$(CONFIG_SOFTMMU) += pmp.o > +obj-$(CONFIG_KVM) += kvm.o > > ifeq ($(CONFIG_SOFTMMU),y) > obj-y += monitor.o > diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c > new file mode 100644 > index 0000000000..8c386d9acf > --- /dev/null > +++ b/target/riscv/kvm.c > @@ -0,0 +1,128 @@ > +/* > + * RISC-V implementation of KVM hooks > + * > + * Copyright (c) 2020 Huawei Technologies Co., Ltd > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms and conditions of the GNU General Public License, > + * version 2 or later, as published by the Free Software Foundation. > + * > + * This program is distributed in the hope it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > + * more details. > + * > + * You should have received a copy of the GNU General Public License along with > + * this program. If not, see <http://www.gnu.org/licenses/>. > + */ > + > +#include "qemu/osdep.h" > +#include <sys/ioctl.h> > + > +#include <linux/kvm.h> > + > +#include "qemu-common.h" > +#include "qemu/timer.h" > +#include "qemu/error-report.h" > +#include "qemu/main-loop.h" > +#include "sysemu/sysemu.h" > +#include "sysemu/kvm.h" > +#include "sysemu/kvm_int.h" > +#include "cpu.h" > +#include "trace.h" > +#include "hw/pci/pci.h" > +#include "exec/memattrs.h" > +#include "exec/address-spaces.h" > +#include "hw/boards.h" > +#include "hw/irq.h" > +#include "qemu/log.h" > +#include "hw/loader.h" > + > +const KVMCapabilityInfo kvm_arch_required_capabilities[] = { > + KVM_CAP_LAST_INFO > +}; > + > +int kvm_arch_get_registers(CPUState *cs) > +{ > + return 0; > +} > + > +int kvm_arch_put_registers(CPUState *cs, int level) > +{ > + return 0; > +} > + > +int kvm_arch_release_virq_post(int virq) > +{ > + return 0; > +} > + > +int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, > + uint64_t address, uint32_t data, PCIDevice *dev) > +{ > + return 0; > +} > + > +int kvm_arch_destroy_vcpu(CPUState *cs) > +{ > + return 0; > +} > + > +unsigned long kvm_arch_vcpu_id(CPUState *cpu) > +{ > + return cpu->cpu_index; > +} > + > +void kvm_arch_init_irq_routing(KVMState *s) > +{ > +} > + > +int kvm_arch_init_vcpu(CPUState *cs) > +{ > + return 0; > +} > + > +int kvm_arch_msi_data_to_gsi(uint32_t data) > +{ > + abort(); > +} > + > +int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, > + int vector, PCIDevice *dev) > +{ > + return 0; > +} > + > +int kvm_arch_init(MachineState *ms, KVMState *s) > +{ > + return 0; > +} > + > +int kvm_arch_irqchip_create(KVMState *s) > +{ > + return 0; > +} > + > +int kvm_arch_process_async_events(CPUState *cs) > +{ > + return 0; > +} > + > +void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) > +{ > +} > + > +MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) > +{ > + return MEMTXATTRS_UNSPECIFIED; > +} > + > +bool kvm_arch_stop_on_emulation_error(CPUState *cs) > +{ > + return true; > +} > + > +int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) > +{ > + return 0; > +} > -- > 2.19.1 > > >
On Tue, Mar 31, 2020 at 2:43 PM Anup Patel <anup@brainfault.org> wrote: > > On Fri, Mar 13, 2020 at 9:23 AM Yifei Jiang <jiangyifei@huawei.com> wrote: > > > > Add target/riscv/kvm.c to place kvm_arch_* function needed by kvm/kvm-all.c. > > Meanwhile, add riscv64 kvm support to configure. > > This should be for both riscv64 and riscv32. The KVMTOOL compiles perfectly > fine for riscv32 (although not tested much) so there is no harm is supporting > both riscv64 and riscv32 from start itself. For your reference, I have updated KVM RISC-V and KVMTOOL RISC-V repos at: https://github.com/kvm-riscv/linux.git (riscv_kvm_master branch) https://github.com/kvm-riscv/kvmtool.git (riscv_master branch) Above repos work for both RV32 and RV64 systems. Regards, Anup
> -----Original Message----- > From: Anup Patel [mailto:anup@brainfault.org] > Sent: Tuesday, March 31, 2020 7:19 PM > To: Jiangyifei <jiangyifei@huawei.com> > Cc: QEMU Developers <qemu-devel@nongnu.org>; open list:RISC-V > <qemu-riscv@nongnu.org>; Anup Patel <anup.patel@wdc.com>; > Zhanghailiang <zhang.zhanghailiang@huawei.com>; Sagar Karandikar > <sagark@eecs.berkeley.edu>; Bastian Koppelmann > <kbastian@mail.uni-paderborn.de>; Zhangxiaofeng (F) > <victor.zhangxiaofeng@huawei.com>; Alistair Francis > <Alistair.Francis@wdc.com>; yinyipeng <yinyipeng1@huawei.com>; Palmer > Dabbelt <palmer@dabbelt.com>; dengkai (A) <dengkai1@huawei.com> > Subject: Re: [PATCH RFC 2/9] target/riscv: Add target/riscv/kvm.c to place the > public kvm interface > > On Tue, Mar 31, 2020 at 2:43 PM Anup Patel <anup@brainfault.org> wrote: > > > > On Fri, Mar 13, 2020 at 9:23 AM Yifei Jiang <jiangyifei@huawei.com> wrote: > > > > > > Add target/riscv/kvm.c to place kvm_arch_* function needed by > kvm/kvm-all.c. > > > Meanwhile, add riscv64 kvm support to configure. > > > > This should be for both riscv64 and riscv32. The KVMTOOL compiles > > perfectly fine for riscv32 (although not tested much) so there is no > > harm is supporting both riscv64 and riscv32 from start itself. > > For your reference, I have updated KVM RISC-V and KVMTOOL RISC-V repos > at: > https://github.com/kvm-riscv/linux.git (riscv_kvm_master branch) > https://github.com/kvm-riscv/kvmtool.git (riscv_master branch) > > Above repos work for both RV32 and RV64 systems. > > Regards, > Anup Hi, I will add riscv32 support and send v2 series. But I don't test completely, because it need time to build riscv32 QEMU and its dependent libraries. Anyway, I will continue to build and test riscv32 QEMU. By the way, I had a problem with start riscv64 vm at latest kvm-riscv version. lastest version: tcg qemu: https://github.com/qemu/qemu linux: https://github.com/kvm-riscv/linux opensbi: https://github.com/riscv/opensbi kvmtool: https://github.com/kvm-riscv/kvmtool when start vm with kvmtools or this qemu series, I received kernel panic. Do you have this problem ? [ 3.583963] Run /sbin/init as init process [ 3.972264] rcS[44]: unhandled signal 11 code 0x1 at 0x0000003fc8d67170 [ 3.997398] CPU: 0 PID: 44 Comm: rcS Not tainted 5.6.0-rc5-14036-g6e1e9fcf5f30 #2 [ 4.025143] epc: 0000003fc8d67170 ra : 0000000000018c1c sp : 0000003fffb84e00 [ 4.051611] gp : 0000000000136648 tp : 0000003fd6086710 t0 : 0000000000000003 [ 4.078223] t1 : 000000000001792c t2 : 000000000000000b s0 : 0000000000018bf0 [ 4.105082] s1 : 0000003fffa2fa70 a0 : 0000000000019868 a1 : 0000000000000002 [ 4.131824] a2 : 0000003fffb84e08 a3 : 0000000000104984 a4 : 00000000001049dc [ 4.158209] a5 : 0000003fd628e710 a6 : 0000003fffb84e00 a7 : 0000000000000000 [ 4.184756] s2 : 0000003fffa2fa10 s3 : 0000000000137010 s4 : 0000000000000001 [ 4.211448] s5 : 0000003fc8d65918 s6 : 0000000000000001 s7 : 0000000000112000 [ 4.238238] s8 : 0000000000136140 s9 : 0000000000000000 s10: 0000000000000000 [ 4.264880] s11: 0000000000000000 t3 : 0000003fc8d67170 t4 : 0000000000000002 [ 4.291543] t5 : 0000003fd6282180 t6 : 0000000000000000 [ 4.311196] status: 0000000000004020 badaddr: 0000003fc8d67170 cause: 000000000000000c [ 4.348835] init[1]: unhandled signal 11 code 0x1 at 0x0000003fd6292468 [ 4.373718] CPU: 0 PID: 1 Comm: init Not tainted 5.6.0-rc5-14036-g6e1e9fcf5f30 #2 [ 4.401344] epc: 0000003fd6292468 ra : 0000000000102f88 sp : 0000003fffa2f960 [ 4.427814] gp : 0000000000136648 tp : 0000003fc8b50710 t0 : 0000003fd629d170 [ 4.454199] t1 : 0000000000000238 t2 : 00000000001353f0 s0 : 0000000000124000 [ 4.480699] s1 : 0000000000000008 a0 : 0000000000123aa8 a1 : 0000000000000006 [ 4.507352] a2 : 0000000000000000 a3 : 0000000000000000 a4 : 0000000000000000 [ 4.533818] a5 : fffffffffffff000 a6 : 0000003fc8d65918 a7 : 0000000000000104 [ 4.560408] s2 : 0000000000000000 s3 : 0000000000000000 s4 : 0000000000000000 [ 4.586966] s5 : 000000000000002c s6 : 0000000000000003 s7 : 0000000000000000 [ 4.613331] s8 : 0000000000136140 s9 : 0000000000000000 s10: 0000000000000000 [ 4.640006] s11: 0000000000000000 t3 : 0000003fd6292468 t4 : 0000000000000002 [ 4.666372] t5 : 0000003fc8b53dc8 t6 : 0000000000000000 [ 4.686124] status: 0000000000004020 badaddr: 0000003fd6292468 cause: 000000000000000c [ 4.715612] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b Best Regards, Yifei Jiang
diff --git a/configure b/configure index 3c7470096f..30024a8aef 100755 --- a/configure +++ b/configure @@ -200,6 +200,7 @@ supported_kvm_target() { x86_64:i386 | x86_64:x86_64 | x86_64:x32 | \ mips:mips | mipsel:mips | \ ppc:ppc | ppc64:ppc | ppc:ppc64 | ppc64:ppc64 | ppc64:ppc64le | \ + riscv64:riscv64 | \ s390x:s390x) return 0 ;; diff --git a/target/riscv/Makefile.objs b/target/riscv/Makefile.objs index ff651f69f6..7ea8f4c3da 100644 --- a/target/riscv/Makefile.objs +++ b/target/riscv/Makefile.objs @@ -1,5 +1,6 @@ obj-y += translate.o op_helper.o cpu_helper.o cpu.o csr.o fpu_helper.o gdbstub.o obj-$(CONFIG_SOFTMMU) += pmp.o +obj-$(CONFIG_KVM) += kvm.o ifeq ($(CONFIG_SOFTMMU),y) obj-y += monitor.o diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c new file mode 100644 index 0000000000..8c386d9acf --- /dev/null +++ b/target/riscv/kvm.c @@ -0,0 +1,128 @@ +/* + * RISC-V implementation of KVM hooks + * + * Copyright (c) 2020 Huawei Technologies Co., Ltd + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "qemu/osdep.h" +#include <sys/ioctl.h> + +#include <linux/kvm.h> + +#include "qemu-common.h" +#include "qemu/timer.h" +#include "qemu/error-report.h" +#include "qemu/main-loop.h" +#include "sysemu/sysemu.h" +#include "sysemu/kvm.h" +#include "sysemu/kvm_int.h" +#include "cpu.h" +#include "trace.h" +#include "hw/pci/pci.h" +#include "exec/memattrs.h" +#include "exec/address-spaces.h" +#include "hw/boards.h" +#include "hw/irq.h" +#include "qemu/log.h" +#include "hw/loader.h" + +const KVMCapabilityInfo kvm_arch_required_capabilities[] = { + KVM_CAP_LAST_INFO +}; + +int kvm_arch_get_registers(CPUState *cs) +{ + return 0; +} + +int kvm_arch_put_registers(CPUState *cs, int level) +{ + return 0; +} + +int kvm_arch_release_virq_post(int virq) +{ + return 0; +} + +int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, + uint64_t address, uint32_t data, PCIDevice *dev) +{ + return 0; +} + +int kvm_arch_destroy_vcpu(CPUState *cs) +{ + return 0; +} + +unsigned long kvm_arch_vcpu_id(CPUState *cpu) +{ + return cpu->cpu_index; +} + +void kvm_arch_init_irq_routing(KVMState *s) +{ +} + +int kvm_arch_init_vcpu(CPUState *cs) +{ + return 0; +} + +int kvm_arch_msi_data_to_gsi(uint32_t data) +{ + abort(); +} + +int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, + int vector, PCIDevice *dev) +{ + return 0; +} + +int kvm_arch_init(MachineState *ms, KVMState *s) +{ + return 0; +} + +int kvm_arch_irqchip_create(KVMState *s) +{ + return 0; +} + +int kvm_arch_process_async_events(CPUState *cs) +{ + return 0; +} + +void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) +{ +} + +MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) +{ + return MEMTXATTRS_UNSPECIFIED; +} + +bool kvm_arch_stop_on_emulation_error(CPUState *cs) +{ + return true; +} + +int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) +{ + return 0; +}