Message ID | 1586333531-21641-6-git-send-email-hsin-hsiung.wang@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add Support for MediaTek PMIC MT6358 | expand |
On Wed, 08 Apr 2020, Hsin-Hsiung Wang wrote: > From: Ran Bi <ran.bi@mediatek.com> > > This add support for the MediaTek MT6358 RTC. Driver using > compatible data to store different RTC_WRTGR address offset. > This replace RTC_WRTGR to RTC_WRTGR_MT6323 in mt6323-poweroff > driver which only needed by armv7 CPU without ATF. > > Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> > Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > Acked-by: Sebastian Reichel <sre@kernel.org> > Signed-off-by: Ran Bi <ran.bi@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Please place these in chronological order. They should provide some history, rather than a unordered slab list of random sign-offs. > --- > drivers/power/reset/mt6323-poweroff.c | 2 +- > drivers/rtc/rtc-mt6397.c | 18 +++++++++++++++--- > include/linux/mfd/mt6397/rtc.h | 9 ++++++++- > 3 files changed, 24 insertions(+), 5 deletions(-) [...] > diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h > index 7dfb63b..6200f3b 100644 > --- a/include/linux/mfd/mt6397/rtc.h > +++ b/include/linux/mfd/mt6397/rtc.h > @@ -18,7 +18,9 @@ > #define RTC_BBPU_CBUSY BIT(6) > #define RTC_BBPU_KEY (0x43 << 8) > > -#define RTC_WRTGR 0x003c > +#define RTC_WRTGR_MT6358 0x3a > +#define RTC_WRTGR_MT6397 0x3c Why remove the leading 00's? These are now different to the other regs defined in this header. > +#define RTC_WRTGR_MT6323 RTC_WRTGR_MT6397 > > #define RTC_IRQ_STA 0x0002 Like here for instance --^ > #define RTC_IRQ_STA_AL BIT(0) > @@ -65,6 +67,10 @@ > #define MTK_RTC_POLL_DELAY_US 10 > #define MTK_RTC_POLL_TIMEOUT (jiffies_to_usecs(HZ)) > > +struct mtk_rtc_data { > + u32 wrtgr; > +}; > + > struct mt6397_rtc { > struct device *dev; > struct rtc_device *rtc_dev; > @@ -74,6 +80,7 @@ struct mt6397_rtc { > struct regmap *regmap; > int irq; > u32 addr_base; > + const struct mtk_rtc_data *data; > }; > > #endif /* _LINUX_MFD_MT6397_RTC_H_ */
On Thu, 2020-04-16 at 10:14 +0100, Lee Jones wrote: > On Wed, 08 Apr 2020, Hsin-Hsiung Wang wrote: > > > From: Ran Bi <ran.bi@mediatek.com> > > > > This add support for the MediaTek MT6358 RTC. Driver using > > compatible data to store different RTC_WRTGR address offset. > > This replace RTC_WRTGR to RTC_WRTGR_MT6323 in mt6323-poweroff > > driver which only needed by armv7 CPU without ATF. > > > > Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> > > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> > > Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > > Acked-by: Sebastian Reichel <sre@kernel.org> > > Signed-off-by: Ran Bi <ran.bi@mediatek.com> > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > > Please place these in chronological order. They should provide some > history, rather than a unordered slab list of random sign-offs. > I suppose that you mean the order should be like below, right? Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Acked-by: Sebastian Reichel <sre@kernel.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Signed-off-by: Ran Bi <ran.bi@mediatek.com> > > --- > > drivers/power/reset/mt6323-poweroff.c | 2 +- > > drivers/rtc/rtc-mt6397.c | 18 +++++++++++++++--- > > include/linux/mfd/mt6397/rtc.h | 9 ++++++++- > > 3 files changed, 24 insertions(+), 5 deletions(-) > > [...] > > > diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h > > index 7dfb63b..6200f3b 100644 > > --- a/include/linux/mfd/mt6397/rtc.h > > +++ b/include/linux/mfd/mt6397/rtc.h > > @@ -18,7 +18,9 @@ > > #define RTC_BBPU_CBUSY BIT(6) > > #define RTC_BBPU_KEY (0x43 << 8) > > > > -#define RTC_WRTGR 0x003c > > +#define RTC_WRTGR_MT6358 0x3a > > +#define RTC_WRTGR_MT6397 0x3c > > Why remove the leading 00's? > > These are now different to the other regs defined in this header. > I will fix this at next patch. > > +#define RTC_WRTGR_MT6323 RTC_WRTGR_MT6397 > > > > #define RTC_IRQ_STA 0x0002 > > Like here for instance --^ > > > #define RTC_IRQ_STA_AL BIT(0) > > @@ -65,6 +67,10 @@ > > #define MTK_RTC_POLL_DELAY_US 10 > > #define MTK_RTC_POLL_TIMEOUT (jiffies_to_usecs(HZ)) > > > > +struct mtk_rtc_data { > > + u32 wrtgr; > > +}; > > + > > struct mt6397_rtc { > > struct device *dev; > > struct rtc_device *rtc_dev; > > @@ -74,6 +80,7 @@ struct mt6397_rtc { > > struct regmap *regmap; > > int irq; > > u32 addr_base; > > + const struct mtk_rtc_data *data; > > }; > > > > #endif /* _LINUX_MFD_MT6397_RTC_H_ */ >
On Fri, 2020-04-17 at 16:29 +0800, Ran Bi wrote: > On Thu, 2020-04-16 at 10:14 +0100, Lee Jones wrote: > > On Wed, 08 Apr 2020, Hsin-Hsiung Wang wrote: > > > > > From: Ran Bi <ran.bi@mediatek.com> > > > > > > This add support for the MediaTek MT6358 RTC. Driver using > > > compatible data to store different RTC_WRTGR address offset. > > > This replace RTC_WRTGR to RTC_WRTGR_MT6323 in mt6323-poweroff > > > driver which only needed by armv7 CPU without ATF. > > > > > > Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> > > > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> > > > Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > > > Acked-by: Sebastian Reichel <sre@kernel.org> > > > Signed-off-by: Ran Bi <ran.bi@mediatek.com> > > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > > > > Please place these in chronological order. They should provide some > > history, rather than a unordered slab list of random sign-offs. > > > > I suppose that you mean the order should be like below, right? > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> > Acked-by: Sebastian Reichel <sre@kernel.org> > Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > Signed-off-by: Ran Bi <ran.bi@mediatek.com> > Correction, I think following is the correct chronological order: Signed-off-by: Ran Bi <ran.bi@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Sebastian Reichel <sre@kernel.org> Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> > > > --- > > > drivers/power/reset/mt6323-poweroff.c | 2 +- > > > drivers/rtc/rtc-mt6397.c | 18 +++++++++++++++--- > > > include/linux/mfd/mt6397/rtc.h | 9 ++++++++- > > > 3 files changed, 24 insertions(+), 5 deletions(-) > > > > [...] > > > > > diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h > > > index 7dfb63b..6200f3b 100644 > > > --- a/include/linux/mfd/mt6397/rtc.h > > > +++ b/include/linux/mfd/mt6397/rtc.h > > > @@ -18,7 +18,9 @@ > > > #define RTC_BBPU_CBUSY BIT(6) > > > #define RTC_BBPU_KEY (0x43 << 8) > > > > > > -#define RTC_WRTGR 0x003c > > > +#define RTC_WRTGR_MT6358 0x3a > > > +#define RTC_WRTGR_MT6397 0x3c > > > > Why remove the leading 00's? > > > > These are now different to the other regs defined in this header. > > > > I will fix this at next patch. > > > > +#define RTC_WRTGR_MT6323 RTC_WRTGR_MT6397 > > > > > > #define RTC_IRQ_STA 0x0002 > > > > Like here for instance --^ > > > > > #define RTC_IRQ_STA_AL BIT(0) > > > @@ -65,6 +67,10 @@ > > > #define MTK_RTC_POLL_DELAY_US 10 > > > #define MTK_RTC_POLL_TIMEOUT (jiffies_to_usecs(HZ)) > > > > > > +struct mtk_rtc_data { > > > + u32 wrtgr; > > > +}; > > > + > > > struct mt6397_rtc { > > > struct device *dev; > > > struct rtc_device *rtc_dev; > > > @@ -74,6 +80,7 @@ struct mt6397_rtc { > > > struct regmap *regmap; > > > int irq; > > > u32 addr_base; > > > + const struct mtk_rtc_data *data; > > > }; > > > > > > #endif /* _LINUX_MFD_MT6397_RTC_H_ */ > > >
On Fri, 17 Apr 2020, Ran Bi wrote: > On Thu, 2020-04-16 at 10:14 +0100, Lee Jones wrote: > > On Wed, 08 Apr 2020, Hsin-Hsiung Wang wrote: > > > > > From: Ran Bi <ran.bi@mediatek.com> > > > > > > This add support for the MediaTek MT6358 RTC. Driver using > > > compatible data to store different RTC_WRTGR address offset. > > > This replace RTC_WRTGR to RTC_WRTGR_MT6323 in mt6323-poweroff > > > driver which only needed by armv7 CPU without ATF. > > > > > > Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> > > > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> > > > Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > > > Acked-by: Sebastian Reichel <sre@kernel.org> > > > Signed-off-by: Ran Bi <ran.bi@mediatek.com> > > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > > > > Please place these in chronological order. They should provide some > > history, rather than a unordered slab list of random sign-offs. > > > > I suppose that you mean the order should be like below, right? > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> > Acked-by: Sebastian Reichel <sre@kernel.org> > Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > Signed-off-by: Ran Bi <ran.bi@mediatek.com> This would imply that it was reviewed before it was written, which would subsequently imply time-travel, so I suggest not. Author(s) Review(s)/Acks(s)/Tested(s) /* ideally in the order they were received */ Sub-maintainer sign-off /* if applicable */ Maintainer sign-off > > > --- > > > drivers/power/reset/mt6323-poweroff.c | 2 +- > > > drivers/rtc/rtc-mt6397.c | 18 +++++++++++++++--- > > > include/linux/mfd/mt6397/rtc.h | 9 ++++++++- > > > 3 files changed, 24 insertions(+), 5 deletions(-)
On Fri, 17 Apr 2020, Ran Bi wrote: > On Fri, 2020-04-17 at 16:29 +0800, Ran Bi wrote: > > On Thu, 2020-04-16 at 10:14 +0100, Lee Jones wrote: > > > On Wed, 08 Apr 2020, Hsin-Hsiung Wang wrote: > > > > > > > From: Ran Bi <ran.bi@mediatek.com> > > > > > > > > This add support for the MediaTek MT6358 RTC. Driver using > > > > compatible data to store different RTC_WRTGR address offset. > > > > This replace RTC_WRTGR to RTC_WRTGR_MT6323 in mt6323-poweroff > > > > driver which only needed by armv7 CPU without ATF. > > > > > > > > Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> > > > > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> > > > > Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > > > > Acked-by: Sebastian Reichel <sre@kernel.org> > > > > Signed-off-by: Ran Bi <ran.bi@mediatek.com> > > > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > > > > > > Please place these in chronological order. They should provide some > > > history, rather than a unordered slab list of random sign-offs. > > > > > > > I suppose that you mean the order should be like below, right? > > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> > > Acked-by: Sebastian Reichel <sre@kernel.org> > > Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > > Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> > > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > > Signed-off-by: Ran Bi <ran.bi@mediatek.com> > > > > Correction, I think following is the correct chronological order: > Signed-off-by: Ran Bi <ran.bi@mediatek.com> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> > Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> > Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > Acked-by: Sebastian Reichel <sre@kernel.org> > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> This looks better, yes.
diff --git a/drivers/power/reset/mt6323-poweroff.c b/drivers/power/reset/mt6323-poweroff.c index 1caf43d..0532803 100644 --- a/drivers/power/reset/mt6323-poweroff.c +++ b/drivers/power/reset/mt6323-poweroff.c @@ -30,7 +30,7 @@ static void mt6323_do_pwroff(void) int ret; regmap_write(pwrc->regmap, pwrc->base + RTC_BBPU, RTC_BBPU_KEY); - regmap_write(pwrc->regmap, pwrc->base + RTC_WRTGR, 1); + regmap_write(pwrc->regmap, pwrc->base + RTC_WRTGR_MT6323, 1); ret = regmap_read_poll_timeout(pwrc->regmap, pwrc->base + RTC_BBPU, val, diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c index cda238d..f8b1353 100644 --- a/drivers/rtc/rtc-mt6397.c +++ b/drivers/rtc/rtc-mt6397.c @@ -9,6 +9,7 @@ #include <linux/mfd/mt6397/core.h> #include <linux/module.h> #include <linux/mutex.h> +#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/rtc.h> @@ -20,7 +21,7 @@ static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc) int ret; u32 data; - ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1); + ret = regmap_write(rtc->regmap, rtc->addr_base + rtc->data->wrtgr, 1); if (ret < 0) return ret; @@ -269,6 +270,8 @@ static int mtk_rtc_probe(struct platform_device *pdev) res = platform_get_resource(pdev, IORESOURCE_MEM, 0); rtc->addr_base = res->start; + rtc->data = of_device_get_match_data(&pdev->dev); + rtc->irq = platform_get_irq(pdev, 0); if (rtc->irq < 0) return rtc->irq; @@ -325,9 +328,18 @@ static int mt6397_rtc_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend, mt6397_rtc_resume); +static const struct mtk_rtc_data mt6358_rtc_data = { + .wrtgr = RTC_WRTGR_MT6358, +}; + +static const struct mtk_rtc_data mt6397_rtc_data = { + .wrtgr = RTC_WRTGR_MT6397, +}; + static const struct of_device_id mt6397_rtc_of_match[] = { - { .compatible = "mediatek,mt6323-rtc", }, - { .compatible = "mediatek,mt6397-rtc", }, + { .compatible = "mediatek,mt6323-rtc", .data = &mt6397_rtc_data }, + { .compatible = "mediatek,mt6358-rtc", .data = &mt6358_rtc_data }, + { .compatible = "mediatek,mt6397-rtc", .data = &mt6397_rtc_data }, { } }; MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match); diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h index 7dfb63b..6200f3b 100644 --- a/include/linux/mfd/mt6397/rtc.h +++ b/include/linux/mfd/mt6397/rtc.h @@ -18,7 +18,9 @@ #define RTC_BBPU_CBUSY BIT(6) #define RTC_BBPU_KEY (0x43 << 8) -#define RTC_WRTGR 0x003c +#define RTC_WRTGR_MT6358 0x3a +#define RTC_WRTGR_MT6397 0x3c +#define RTC_WRTGR_MT6323 RTC_WRTGR_MT6397 #define RTC_IRQ_STA 0x0002 #define RTC_IRQ_STA_AL BIT(0) @@ -65,6 +67,10 @@ #define MTK_RTC_POLL_DELAY_US 10 #define MTK_RTC_POLL_TIMEOUT (jiffies_to_usecs(HZ)) +struct mtk_rtc_data { + u32 wrtgr; +}; + struct mt6397_rtc { struct device *dev; struct rtc_device *rtc_dev; @@ -74,6 +80,7 @@ struct mt6397_rtc { struct regmap *regmap; int irq; u32 addr_base; + const struct mtk_rtc_data *data; }; #endif /* _LINUX_MFD_MT6397_RTC_H_ */