| Message ID | 20200506174238.15385-15-Sergey.Semin@baikalelectronics.ru (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | None | expand |
Hello! On 05/06/2020 08:42 PM, Sergey.Semin@baikalelectronics.ru wrote: > From: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > Similar to commit 8e5c62e38a88 ("mips: early_printk_8250: Use offset-sized > IO-mem accessors") the IO-memory might require to use a proper load/store > instructions (like Bailal-T1 IO-memory). To fix the cps-vec UART debug Baikal? :-) > printout lets use the memory access instructions in accordance with the > UART registers offset config specified at boot time. > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> > Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> > Cc: Paul Burton <paulburton@kernel.org> > Cc: Ralf Baechle <ralf@linux-mips.org> > Cc: Arnd Bergmann <arnd@arndb.de> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: linux-pm@vger.kernel.org > Cc: devicetree@vger.kernel.org > > --- > There might be another problem in cps-vec-ns16550.S connected with the > difference in CPU/devices endinanness on some platforms. But there is Endianness. > no such for Baikal-T1 SoC. [...] MBR, Sergei
Hi On Wed, May 06, 2020 at 09:16:24PM +0300, Sergei Shtylyov wrote: > Hello! > > On 05/06/2020 08:42 PM, Sergey.Semin@baikalelectronics.ru wrote: > > > From: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > > > Similar to commit 8e5c62e38a88 ("mips: early_printk_8250: Use offset-sized > > IO-mem accessors") the IO-memory might require to use a proper load/store > > instructions (like Bailal-T1 IO-memory). To fix the cps-vec UART debug > > Baikal? :-) Yeah, thanks.) > > > printout lets use the memory access instructions in accordance with the > > UART registers offset config specified at boot time. > > > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> > > Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> > > Cc: Paul Burton <paulburton@kernel.org> > > Cc: Ralf Baechle <ralf@linux-mips.org> > > Cc: Arnd Bergmann <arnd@arndb.de> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: linux-pm@vger.kernel.org > > Cc: devicetree@vger.kernel.org > > > > --- > > There might be another problem in cps-vec-ns16550.S connected with the > > difference in CPU/devices endinanness on some platforms. But there is > > Endianness. Ah, this won't get into the commit message anyway. But thanks for noticing.) -Sergey > > > no such for Baikal-T1 SoC. > [...] > > MBR, Sergei
diff --git a/arch/mips/kernel/cps-vec-ns16550.S b/arch/mips/kernel/cps-vec-ns16550.S index d5a67b4ce9f6..2adb1c56c7c5 100644 --- a/arch/mips/kernel/cps-vec-ns16550.S +++ b/arch/mips/kernel/cps-vec-ns16550.S @@ -14,16 +14,30 @@ #define UART_TX_OFS (UART_TX << CONFIG_MIPS_CPS_NS16550_SHIFT) #define UART_LSR_OFS (UART_LSR << CONFIG_MIPS_CPS_NS16550_SHIFT) +#if CONFIG_MIPS_CPS_NS16550_SHIFT == 0 +# define UART_L lb +# define UART_S sb +#elif CONFIG_MIPS_CPS_NS16550_SHIFT == 1 +# define UART_L lh +# define UART_S sh +#elif CONFIG_MIPS_CPS_NS16550_SHIFT == 2 +# define UART_L lw +# define UART_S sw +#else +# define UART_L lw +# define UART_S sb +#endif + /** * _mips_cps_putc() - write a character to the UART * @a0: ASCII character to write * @t9: UART base address */ LEAF(_mips_cps_putc) -1: lw t0, UART_LSR_OFS(t9) +1: UART_L t0, UART_LSR_OFS(t9) andi t0, t0, UART_LSR_TEMT beqz t0, 1b - sb a0, UART_TX_OFS(t9) + UART_S a0, UART_TX_OFS(t9) jr ra END(_mips_cps_putc)