| Message ID | 20200521003443.11385-12-Sergey.Semin@baikalelectronics.ru (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | mips: Prepare MIPS-arch code for Baikal-T1 SoC support | expand |
Hello! On 21.05.2020 3:34, Serge Semin wrote: > CDMM may be available not only MIPS R2 architectures, but also in ^ on -re, it's singular > newer MIPS R5 chips. For instance our P5600 chip has one. Lets mark > the CDMM bus being supported for that MIPS arch too. > > Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> > Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > Reviewed-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> > Cc: Paul Burton <paulburton@kernel.org> > Cc: Ralf Baechle <ralf@linux-mips.org> > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> > Cc: Arnd Bergmann <arnd@arndb.de> > Cc: Olof Johansson <olof@lixom.net> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: linux-mips@vger.kernel.org > Cc: devicetree@vger.kernel.org [...] MBR, Sergei
On Thu, May 21, 2020 at 01:25:21PM +0300, Sergei Shtylyov wrote: > Hello! > > On 21.05.2020 3:34, Serge Semin wrote: > > > CDMM may be available not only MIPS R2 architectures, but also in > ^ on -re, it's singular Thanks, Sergey. Got it. I'll fix it in the next revision. > > > newer MIPS R5 chips. For instance our P5600 chip has one. Lets mark Probably also: ^ Let's Right? -Sergey > > the CDMM bus being supported for that MIPS arch too. > > > > Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> > > Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > Reviewed-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> > > Cc: Paul Burton <paulburton@kernel.org> > > Cc: Ralf Baechle <ralf@linux-mips.org> > > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> > > Cc: Arnd Bergmann <arnd@arndb.de> > > Cc: Olof Johansson <olof@lixom.net> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: linux-mips@vger.kernel.org > > Cc: devicetree@vger.kernel.org > [...] > > MBR, Sergei
On 21.05.2020 15:58, Serge Semin wrote: >>> CDMM may be available not only MIPS R2 architectures, but also in >> ^ on -re, it's singular > > Thanks, Sergey. Got it. I'll fix it in the next revision. > >>> newer MIPS R5 chips. For instance our P5600 chip has one. Lets mark > Probably also: ^ Let's > Right? Yes. Thanks for replying. :-) > > -Sergey > >>> the CDMM bus being supported for that MIPS arch too. > >>> >>> Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> >>> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> >>> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> >>> Reviewed-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> >>> Cc: Paul Burton <paulburton@kernel.org> >>> Cc: Ralf Baechle <ralf@linux-mips.org> >>> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> >>> Cc: Arnd Bergmann <arnd@arndb.de> >>> Cc: Olof Johansson <olof@lixom.net> >>> Cc: Rob Herring <robh+dt@kernel.org> >>> Cc: linux-mips@vger.kernel.org >>> Cc: devicetree@vger.kernel.org >> [...] MBR, Sergei
diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig index 6d4e4497b59b..971c07bc92d4 100644 --- a/drivers/bus/Kconfig +++ b/drivers/bus/Kconfig @@ -58,7 +58,7 @@ config IMX_WEIM config MIPS_CDMM bool "MIPS Common Device Memory Map (CDMM) Driver" - depends on CPU_MIPSR2 + depends on CPU_MIPSR2 || CPU_MIPSR5 help Driver needed for the MIPS Common Device Memory Map bus in MIPS cores. This bus is for per-CPU tightly coupled devices such as the