| Message ID | 20200528222401.26941-10-Sergey.Semin@baikalelectronics.ru (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | dmaengine: dw: Take Baikal-T1 SoC DW DMAC peculiarities into account | expand |
On Fri, May 29, 2020 at 01:23:59AM +0300, Serge Semin wrote: > According to the DW APB DMAC data book the minimum burst transaction > length is 1 and it's true for any version of the controller since > isn't parametrised in the coreAssembler so can't be changed at the > IP-core synthesis stage. Let's initialise the min_burst member of the > DMA controller descriptor so the DMA clients could use it to properly > optimize the DMA requests. > @@ -1229,6 +1229,7 @@ int do_dma_probe(struct dw_dma_chip *chip) > dw->dma.device_issue_pending = dwc_issue_pending; > > /* DMA capabilities */ > + dw->dma.min_burst = 1; Perhaps then relaxed maximum, like dw->dma.max_burst = 256; (channels will update this) ? > dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS; > dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS; > dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) | > -- > 2.26.2 >
On Fri, May 29, 2020 at 01:25:15PM +0300, Andy Shevchenko wrote: > On Fri, May 29, 2020 at 01:23:59AM +0300, Serge Semin wrote: > > According to the DW APB DMAC data book the minimum burst transaction > > length is 1 and it's true for any version of the controller since > > isn't parametrised in the coreAssembler so can't be changed at the > > IP-core synthesis stage. Let's initialise the min_burst member of the > > DMA controller descriptor so the DMA clients could use it to properly > > optimize the DMA requests. ... > > /* DMA capabilities */ > > > + dw->dma.min_burst = 1; > > Perhaps then relaxed maximum, like > > dw->dma.max_burst = 256; > > (channels will update this) > > ? And forgot to mention that perhaps we need a definitions for both. > > dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS; > > dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS;
On Fri, May 29, 2020 at 01:29:02PM +0300, Andy Shevchenko wrote: > On Fri, May 29, 2020 at 01:25:15PM +0300, Andy Shevchenko wrote: > > On Fri, May 29, 2020 at 01:23:59AM +0300, Serge Semin wrote: > > > According to the DW APB DMAC data book the minimum burst transaction > > > length is 1 and it's true for any version of the controller since > > > isn't parametrised in the coreAssembler so can't be changed at the > > > IP-core synthesis stage. Let's initialise the min_burst member of the > > > DMA controller descriptor so the DMA clients could use it to properly > > > optimize the DMA requests. > > ... > > > > /* DMA capabilities */ > > > > > + dw->dma.min_burst = 1; > > > > Perhaps then relaxed maximum, like > > > > dw->dma.max_burst = 256; > > > > (channels will update this) > > > > ? > > And forgot to mention that perhaps we need a definitions for both. By "definitions for both" do you mean a macro with corresponding parameter definition like it's done for the max burst length in the next patch? Something like this: --- include/linux/platform_data/dma-dw.h +++ include/linux/platform_data/dma-dw.h +#define DW_DMA_MIN_BURST 1 +#define DW_DMA_MAX_BURST 256 ? -Sergey > > > > dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS; > > > dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS; > > -- > With Best Regards, > Andy Shevchenko > >
On Fri, May 29, 2020 at 01:41:19PM +0300, Serge Semin wrote: > On Fri, May 29, 2020 at 01:29:02PM +0300, Andy Shevchenko wrote: > > On Fri, May 29, 2020 at 01:25:15PM +0300, Andy Shevchenko wrote: > > > On Fri, May 29, 2020 at 01:23:59AM +0300, Serge Semin wrote: ... > > > > /* DMA capabilities */ > > > > + dw->dma.min_burst = 1; > > > > > > Perhaps then relaxed maximum, like > > > > > > dw->dma.max_burst = 256; > > > > > > (channels will update this) > > > > > > ? > > > And forgot to mention that perhaps we need a definitions for both. > > By "definitions for both" do you mean a macro with corresponding parameter > definition like it's done for the max burst length in the next patch? > Something like this: > --- include/linux/platform_data/dma-dw.h > +++ include/linux/platform_data/dma-dw.h > +#define DW_DMA_MIN_BURST 1 > +#define DW_DMA_MAX_BURST 256 > > ? Yes!
On Fri, May 29, 2020 at 01:50:09PM +0300, Andy Shevchenko wrote: > On Fri, May 29, 2020 at 01:41:19PM +0300, Serge Semin wrote: > > On Fri, May 29, 2020 at 01:29:02PM +0300, Andy Shevchenko wrote: > > > On Fri, May 29, 2020 at 01:25:15PM +0300, Andy Shevchenko wrote: > > > > On Fri, May 29, 2020 at 01:23:59AM +0300, Serge Semin wrote: > > ... > > > > > > /* DMA capabilities */ > > > > > + dw->dma.min_burst = 1; > > > > > > > > Perhaps then relaxed maximum, like > > > > > > > > dw->dma.max_burst = 256; > > > > > > > > (channels will update this) > > > > > > > > ? > > > > > And forgot to mention that perhaps we need a definitions for both. > > > > By "definitions for both" do you mean a macro with corresponding parameter > > definition like it's done for the max burst length in the next patch? > > Something like this: > > --- include/linux/platform_data/dma-dw.h > > +++ include/linux/platform_data/dma-dw.h > > +#define DW_DMA_MIN_BURST 1 > > +#define DW_DMA_MAX_BURST 256 > > > > ? > > Yes! Ok. Good idea. I'll do that. Thanks. -Sergey > > -- > With Best Regards, > Andy Shevchenko > >
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index ceded21537e2..a8cebb1dbb68 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -1229,6 +1229,7 @@ int do_dma_probe(struct dw_dma_chip *chip) dw->dma.device_issue_pending = dwc_issue_pending; /* DMA capabilities */ + dw->dma.min_burst = 1; dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS; dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS; dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) |
According to the DW APB DMAC data book the minimum burst transaction length is 1 and it's true for any version of the controller since isn't parametrised in the coreAssembler so can't be changed at the IP-core synthesis stage. Let's initialise the min_burst member of the DMA controller descriptor so the DMA clients could use it to properly optimize the DMA requests. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-mips@vger.kernel.org Cc: devicetree@vger.kernel.org --- Changelog v4: - This is a new patch suggested by Andy. --- drivers/dma/dw/core.c | 1 + 1 file changed, 1 insertion(+)