| Message ID | 20200530073243.16411-3-git@xen0n.name (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | f06da27eb82e358ca389ccb9d13de61e94e77a47 |
| Headers | show |
| Series | CPUCFG emulation future-proofing & HWCAP addition | expand |
Reviewed-by: Huacai Chen <chenhc@lemote.com> On Sat, May 30, 2020 at 3:34 PM WANG Xuerui <git@xen0n.name> wrote: > > The point is to allow userspace to probe for CPUCFG without possibly > triggering invalid instructions. In addition to that, future Loongson > feature bits could all be stuffed into CPUCFG bit fields (or "leaves" > in x86-speak) if Loongson does not make mistakes, so ELF HWCAP bits are > conserved. > > Userspace can determine native CPUCFG availability by checking the LCSRP > (Loongson CSR Present) bit in CPUCFG output after seeing CPUCFG bit in > HWCAP. Native CPUCFG always sets the LCSRP bit, as CPUCFG is part of the > Loongson CSR ASE, while the emulation intentionally leaves this bit > clear. > > The other existing Loongson-specific HWCAP bits are, to my best > knowledge, unused, as > > (1) they are fairly recent additions, > (2) Loongson never back-ported the patch into their kernel fork, and > (3) Loongson's existing installed base rarely upgrade, if ever; > > However, they are still considered userspace ABI, hence unfortunately > unremovable. But hopefully at least we could stop adding new Loongson > HWCAP bits in the future. > > Cc: Paul Burton <paulburton@kernel.org> > Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> > Cc: Huacai Chen <chenhc@lemote.com> > Signed-off-by: WANG Xuerui <git@xen0n.name> > --- > > v2: tweaked commit message. > > arch/mips/include/uapi/asm/hwcap.h | 1 + > arch/mips/loongson64/cpucfg-emul.c | 9 ++++++++- > 2 files changed, 9 insertions(+), 1 deletion(-) > > diff --git a/arch/mips/include/uapi/asm/hwcap.h b/arch/mips/include/uapi/asm/hwcap.h > index 1ade1daa4921..b7e02bdc1985 100644 > --- a/arch/mips/include/uapi/asm/hwcap.h > +++ b/arch/mips/include/uapi/asm/hwcap.h > @@ -17,5 +17,6 @@ > #define HWCAP_LOONGSON_MMI (1 << 11) > #define HWCAP_LOONGSON_EXT (1 << 12) > #define HWCAP_LOONGSON_EXT2 (1 << 13) > +#define HWCAP_LOONGSON_CPUCFG (1 << 14) > > #endif /* _UAPI_ASM_HWCAP_H */ > diff --git a/arch/mips/loongson64/cpucfg-emul.c b/arch/mips/loongson64/cpucfg-emul.c > index c16023a13379..ca75f07252df 100644 > --- a/arch/mips/loongson64/cpucfg-emul.c > +++ b/arch/mips/loongson64/cpucfg-emul.c > @@ -4,6 +4,7 @@ > #include <linux/types.h> > #include <asm/cpu.h> > #include <asm/cpu-info.h> > +#include <asm/elf.h> > > #include <loongson_regs.h> > #include <cpucfg-emul.h> > @@ -128,7 +129,7 @@ void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips *c) > > /* CPUs with CPUCFG support don't need to synthesize anything. */ > if (cpu_has_cfg()) > - return; > + goto have_cpucfg_now; > > c->loongson3_cpucfg_data[0] = 0; > c->loongson3_cpucfg_data[1] = 0; > @@ -217,4 +218,10 @@ void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips *c) > patch_cpucfg_sel1(c); > patch_cpucfg_sel2(c); > patch_cpucfg_sel3(c); > + > +have_cpucfg_now: > + /* We have usable CPUCFG now, emulated or not. > + * Announce CPUCFG availability to userspace via hwcap. > + */ > + elf_hwcap |= HWCAP_LOONGSON_CPUCFG; > } > -- > 2.26.2 >
diff --git a/arch/mips/include/uapi/asm/hwcap.h b/arch/mips/include/uapi/asm/hwcap.h index 1ade1daa4921..b7e02bdc1985 100644 --- a/arch/mips/include/uapi/asm/hwcap.h +++ b/arch/mips/include/uapi/asm/hwcap.h @@ -17,5 +17,6 @@ #define HWCAP_LOONGSON_MMI (1 << 11) #define HWCAP_LOONGSON_EXT (1 << 12) #define HWCAP_LOONGSON_EXT2 (1 << 13) +#define HWCAP_LOONGSON_CPUCFG (1 << 14) #endif /* _UAPI_ASM_HWCAP_H */ diff --git a/arch/mips/loongson64/cpucfg-emul.c b/arch/mips/loongson64/cpucfg-emul.c index c16023a13379..ca75f07252df 100644 --- a/arch/mips/loongson64/cpucfg-emul.c +++ b/arch/mips/loongson64/cpucfg-emul.c @@ -4,6 +4,7 @@ #include <linux/types.h> #include <asm/cpu.h> #include <asm/cpu-info.h> +#include <asm/elf.h> #include <loongson_regs.h> #include <cpucfg-emul.h> @@ -128,7 +129,7 @@ void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips *c) /* CPUs with CPUCFG support don't need to synthesize anything. */ if (cpu_has_cfg()) - return; + goto have_cpucfg_now; c->loongson3_cpucfg_data[0] = 0; c->loongson3_cpucfg_data[1] = 0; @@ -217,4 +218,10 @@ void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips *c) patch_cpucfg_sel1(c); patch_cpucfg_sel2(c); patch_cpucfg_sel3(c); + +have_cpucfg_now: + /* We have usable CPUCFG now, emulated or not. + * Announce CPUCFG availability to userspace via hwcap. + */ + elf_hwcap |= HWCAP_LOONGSON_CPUCFG; }
The point is to allow userspace to probe for CPUCFG without possibly triggering invalid instructions. In addition to that, future Loongson feature bits could all be stuffed into CPUCFG bit fields (or "leaves" in x86-speak) if Loongson does not make mistakes, so ELF HWCAP bits are conserved. Userspace can determine native CPUCFG availability by checking the LCSRP (Loongson CSR Present) bit in CPUCFG output after seeing CPUCFG bit in HWCAP. Native CPUCFG always sets the LCSRP bit, as CPUCFG is part of the Loongson CSR ASE, while the emulation intentionally leaves this bit clear. The other existing Loongson-specific HWCAP bits are, to my best knowledge, unused, as (1) they are fairly recent additions, (2) Loongson never back-ported the patch into their kernel fork, and (3) Loongson's existing installed base rarely upgrade, if ever; However, they are still considered userspace ABI, hence unfortunately unremovable. But hopefully at least we could stop adding new Loongson HWCAP bits in the future. Cc: Paul Burton <paulburton@kernel.org> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Huacai Chen <chenhc@lemote.com> Signed-off-by: WANG Xuerui <git@xen0n.name> --- v2: tweaked commit message. arch/mips/include/uapi/asm/hwcap.h | 1 + arch/mips/loongson64/cpucfg-emul.c | 9 ++++++++- 2 files changed, 9 insertions(+), 1 deletion(-)