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[RESEND,v2,0/6] mips: Add DT bindings for MIPS CDMM and MIPS GIC

Message ID 20200601122121.15809-1-Sergey.Semin@baikalelectronics.ru (mailing list archive)
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Series mips: Add DT bindings for MIPS CDMM and MIPS GIC | expand

Message

Serge Semin June 1, 2020, 12:21 p.m. UTC
Folks, the code and DT-related patches here have been mostly reviewed.
Please consider merge the series in or at least give me a feedback to
update the series, since merge window is getting opened tomorrow and I
would really appreciate to see the leftover being merged in.

Regarding this patchset origin. Recently I've submitted a series of
patchset's which provided multiple fixes for the MIPS arch subsystem and
the MIPS GIC and DW APB Timer drivers, which were required for the
Baikal-T1 SoC correctly working with those drivers. Mostly those patchsets
have been already merged into the corresponding subsystems, but several
patches have been left floating since noone really responded for review
except Rob provided his approval regarding DT bindings. Thus in this
patchset I've collected all the leftovers so not to loose them in a pale
of the maintainers email logs.

The patchset includes the following updates: MIPS CPC and GIC DT bindings
legacy text-based file are converted to the DT schema (Rob has already
reviewed them), add MIPS CDMM DT node support to place the CDMM block at
the platform-specific MMIO range, make sure MIPS CDMM is available for
MIPS_R5 CPUs.

Seeing the series concerns the MIPS-related drivers it's better to merge
it in through the MIPS repository:
https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/

This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4:
base-commit: 0e698dfa2822 ("Linux 5.7-rc4")
tag: v5.7-rc4

Suggestion.
Since Paul isn't looking after the MIPS arch code anymore, Ralf hasn't
been seen maintaining MIPS for a long time, Thomas is only responsible
for the next part of it:
	F:      Documentation/devicetree/bindings/mips/
	F:      Documentation/mips/
	F:      arch/mips/
	F:      drivers/platform/mips/
the MIPS-specific drivers like:
	F:	drivers/bus/mips_cdmm.c
	F:	drivers/irqchip/irq-mips-cpu.c
	F:	drivers/irqchip/irq-mips-gic.c
	F:	drivers/clocksource/mips-gic-timer.c
	F:	drivers/cpuidle/cpuidle-cps.c
seem to be left for the subsystems maintainers to support. So if you don't
mind or unless there is a better alternative, I can help with looking
after them to ease the maintainers review burden and since I'll be working
on our MIPS-based SoC drivers integrating into the mainline kernel repo
anyway. If you don't like this idea, please just decline the last
patch in the series.

Previous patchsets:
mips: Prepare MIPS-arch code for Baikal-T1 SoC support:
Link: https://lore.kernel.org/linux-mips/20200306124807.3596F80307C2@mail.baikalelectronics.ru
Link: https://lore.kernel.org/linux-mips/20200506174238.15385-1-Sergey.Semin@baikalelectronics.ru
Link: https://lore.kernel.org/linux-mips/20200521140725.29571-1-Sergey.Semin@baikalelectronics.ru

clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support:
Link: https://lore.kernel.org/linux-rtc/20200324174325.14213-1-Sergey.Semin@baikalelectronics.ru
Link: https://lore.kernel.org/linux-rtc/20200506214107.25956-1-Sergey.Semin@baikalelectronics.ru
Link: https://lore.kernel.org/linux-rtc/20200521005321.12129-1-Sergey.Semin@baikalelectronics.ru

Changelog prev:
- Add yaml-based bindings file for MIPS CDMM dt-node.
- Convert mti,mips-cpc to DT schema.
- Use a shorter summary describing the bindings modification patches.
- Rearrange the SoBs with adding Alexey' co-development tag.
- Lowercase the hex numbers in the dt-bindings.

Changelog v2:
- Resend.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <maz@kernel.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

Serge Semin (6):
  dt-bindings: power: Convert mti,mips-cpc to DT schema
  dt-bindings: interrupt-controller: Convert mti,gic to DT schema
  dt-bindings: bus: Add MIPS CDMM controller
  mips: cdmm: Add mti,mips-cdmm dtb node support
  bus: cdmm: Add MIPS R5 arch support
  MAINTAINERS: Add maintainers for MIPS core drivers

 .../bindings/bus/mti,mips-cdmm.yaml           |  35 +++++
 .../interrupt-controller/mips-gic.txt         |  67 --------
 .../interrupt-controller/mti,gic.yaml         | 148 ++++++++++++++++++
 .../bindings/power/mti,mips-cpc.txt           |   8 -
 .../bindings/power/mti,mips-cpc.yaml          |  35 +++++
 MAINTAINERS                                   |  10 ++
 drivers/bus/Kconfig                           |   2 +-
 drivers/bus/mips_cdmm.c                       |  15 ++
 8 files changed, 244 insertions(+), 76 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/bus/mti,mips-cdmm.yaml
 delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml
 delete mode 100644 Documentation/devicetree/bindings/power/mti,mips-cpc.txt
 create mode 100644 Documentation/devicetree/bindings/power/mti,mips-cpc.yaml

Comments

Marc Zyngier June 1, 2020, 12:31 p.m. UTC | #1
On 2020-06-01 13:21, Serge Semin wrote:

[...]

> Since Paul isn't looking after the MIPS arch code anymore, Ralf hasn't
> been seen maintaining MIPS for a long time, Thomas is only responsible
> for the next part of it:
> 	F:      Documentation/devicetree/bindings/mips/
> 	F:      Documentation/mips/
> 	F:      arch/mips/
> 	F:      drivers/platform/mips/
> the MIPS-specific drivers like:
> 	F:	drivers/bus/mips_cdmm.c
> 	F:	drivers/irqchip/irq-mips-cpu.c
> 	F:	drivers/irqchip/irq-mips-gic.c
> 	F:	drivers/clocksource/mips-gic-timer.c
> 	F:	drivers/cpuidle/cpuidle-cps.c
> seem to be left for the subsystems maintainers to support. So if you 
> don't
> mind or unless there is a better alternative, I can help with looking
> after them to ease the maintainers review burden and since I'll be 
> working
> on our MIPS-based SoC drivers integrating into the mainline kernel repo
> anyway. If you don't like this idea, please just decline the last
> patch in the series.

Given how deeply integrated the MIPS GIC is in the architecture, I'd
really like Thomas to co-maintain it, or at the very least give his
blessing on you being the dedicated point of contact for MIPS GIC
stuff.

Thanks,

         M.
Serge Semin June 1, 2020, 3:24 p.m. UTC | #2
Hello Marc,

On Mon, Jun 01, 2020 at 01:31:27PM +0100, Marc Zyngier wrote:
> On 2020-06-01 13:21, Serge Semin wrote:
> 
> [...]
> 
> > Since Paul isn't looking after the MIPS arch code anymore, Ralf hasn't
> > been seen maintaining MIPS for a long time, Thomas is only responsible
> > for the next part of it:
> > 	F:      Documentation/devicetree/bindings/mips/
> > 	F:      Documentation/mips/
> > 	F:      arch/mips/
> > 	F:      drivers/platform/mips/
> > the MIPS-specific drivers like:
> > 	F:	drivers/bus/mips_cdmm.c
> > 	F:	drivers/irqchip/irq-mips-cpu.c
> > 	F:	drivers/irqchip/irq-mips-gic.c
> > 	F:	drivers/clocksource/mips-gic-timer.c
> > 	F:	drivers/cpuidle/cpuidle-cps.c
> > seem to be left for the subsystems maintainers to support. So if you
> > don't
> > mind or unless there is a better alternative, I can help with looking
> > after them to ease the maintainers review burden and since I'll be
> > working
> > on our MIPS-based SoC drivers integrating into the mainline kernel repo
> > anyway. If you don't like this idea, please just decline the last
> > patch in the series.
> 

> Given how deeply integrated the MIPS GIC is in the architecture, I'd
> really like Thomas to co-maintain it, or at the very least give his
> blessing on you being the dedicated point of contact for MIPS GIC
> stuff.

I don't mind either way. First option might be even better. Thomas, what do you
think?

-Sergey

> 
> Thanks,
> 
>         M.
> -- 
> Jazz is not dead. It just smells funny...
Thomas Bogendoerfer June 1, 2020, 4:56 p.m. UTC | #3
On Mon, Jun 01, 2020 at 06:24:49PM +0300, Serge Semin wrote:
> Hello Marc,
> 
> On Mon, Jun 01, 2020 at 01:31:27PM +0100, Marc Zyngier wrote:
> > On 2020-06-01 13:21, Serge Semin wrote:
> > 
> > [...]
> > 
> > > Since Paul isn't looking after the MIPS arch code anymore, Ralf hasn't
> > > been seen maintaining MIPS for a long time, Thomas is only responsible
> > > for the next part of it:
> > > 	F:      Documentation/devicetree/bindings/mips/
> > > 	F:      Documentation/mips/
> > > 	F:      arch/mips/
> > > 	F:      drivers/platform/mips/
> > > the MIPS-specific drivers like:
> > > 	F:	drivers/bus/mips_cdmm.c
> > > 	F:	drivers/irqchip/irq-mips-cpu.c
> > > 	F:	drivers/irqchip/irq-mips-gic.c
> > > 	F:	drivers/clocksource/mips-gic-timer.c
> > > 	F:	drivers/cpuidle/cpuidle-cps.c
> > > seem to be left for the subsystems maintainers to support. So if you
> > > don't
> > > mind or unless there is a better alternative, I can help with looking
> > > after them to ease the maintainers review burden and since I'll be
> > > working
> > > on our MIPS-based SoC drivers integrating into the mainline kernel repo
> > > anyway. If you don't like this idea, please just decline the last
> > > patch in the series.
> > 
> 
> > Given how deeply integrated the MIPS GIC is in the architecture, I'd
> > really like Thomas to co-maintain it, or at the very least give his
> > blessing on you being the dedicated point of contact for MIPS GIC
> > stuff.
> 
> I don't mind either way. First option might be even better. Thomas,
> what do you think?

sure, I'm happy to be your co-maintainer.

Thomas.
Serge Semin June 1, 2020, 5:13 p.m. UTC | #4
On Mon, Jun 01, 2020 at 06:56:46PM +0200, Thomas Bogendoerfer wrote:
> On Mon, Jun 01, 2020 at 06:24:49PM +0300, Serge Semin wrote:
> > Hello Marc,
> > 
> > On Mon, Jun 01, 2020 at 01:31:27PM +0100, Marc Zyngier wrote:
> > > On 2020-06-01 13:21, Serge Semin wrote:
> > > 
> > > [...]
> > > 
> > > > Since Paul isn't looking after the MIPS arch code anymore, Ralf hasn't
> > > > been seen maintaining MIPS for a long time, Thomas is only responsible
> > > > for the next part of it:
> > > > 	F:      Documentation/devicetree/bindings/mips/
> > > > 	F:      Documentation/mips/
> > > > 	F:      arch/mips/
> > > > 	F:      drivers/platform/mips/
> > > > the MIPS-specific drivers like:
> > > > 	F:	drivers/bus/mips_cdmm.c
> > > > 	F:	drivers/irqchip/irq-mips-cpu.c
> > > > 	F:	drivers/irqchip/irq-mips-gic.c
> > > > 	F:	drivers/clocksource/mips-gic-timer.c
> > > > 	F:	drivers/cpuidle/cpuidle-cps.c
> > > > seem to be left for the subsystems maintainers to support. So if you
> > > > don't
> > > > mind or unless there is a better alternative, I can help with looking
> > > > after them to ease the maintainers review burden and since I'll be
> > > > working
> > > > on our MIPS-based SoC drivers integrating into the mainline kernel repo
> > > > anyway. If you don't like this idea, please just decline the last
> > > > patch in the series.
> > > 
> > 
> > > Given how deeply integrated the MIPS GIC is in the architecture, I'd
> > > really like Thomas to co-maintain it, or at the very least give his
> > > blessing on you being the dedicated point of contact for MIPS GIC
> > > stuff.
> > 
> > I don't mind either way. First option might be even better. Thomas,
> > what do you think?
> 
> sure, I'm happy to be your co-maintainer.
> 

Great! As soon as we finish a discussion regarding the files-list ordering
raised around the last patch in the series, I'll resend the patchset with you
added to the list of the MIPS core drivers maintainers.

-Sergey

> Thomas.
> 
> -- 
> Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
> good idea.                                                [ RFC1925, 2.3 ]