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[for-5.1,V4,0/7] mips: Add Loongson-3 machine support (with KVM)

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Series mips: Add Loongson-3 machine support (with KVM) | expand

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chen huacai June 2, 2020, 2:39 a.m. UTC 
Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
Loongson-3A R4 is the newest and its ISA is almost the superset of all
others. To reduce complexity, in QEMU we just define two CPU types:

1, "Loongson-3A1000" CPU which is corresponding to Loongson-3A R1. It is
   suitable for TCG because Loongson-3A R1 has fewest ASE.
2, "Loongson-3A4000" CPU which is corresponding to Loongson-3A R4. It is
   suitable for KVM because Loongson-3A R4 has the VZ ASE.

Loongson-3 lacks English documents. I've tried to translated them with
translate.google.com, and the machine translated documents (together
with their original Chinese versions) are available here.

Loongson-3A R1 (Loongson-3A1000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A1000_p1.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A1000_processor_user_manual_P1.pdf (Chinese Version)
User Manual Part 2:
http://ftp.godson.ac.cn/lemote/3A1000_p2.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A1000_processor_user_manual_P2.pdf (Chinese Version)

Loongson-3A R2 (Loongson-3A2000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A2000_p1.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A2000_user1.pdf (Chinese Version)
User Manual Part 2:
http://ftp.godson.ac.cn/lemote/3A2000_p2.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A2000_user2.pdf (Chinese Version)

Loongson-3A R3 (Loongson-3A3000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A3000_p1.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A3000_3B3000usermanual1.pdf (Chinese Version)
User Manual Part 2:
http://ftp.godson.ac.cn/lemote/3A3000_p2.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A3000_3B3000usermanual2.pdf (Chinese Version)

Loongson-3A R4 (Loongson-3A4000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A4000_p1.pdf
http://ftp.godson.ac.cn/lemote/3A4000user.pdf (Chinese Version)
User Manual Part 2:
I'm sorry that it is unavailable now.

We are preparing to add QEMU's Loongson-3 support. MIPS VZ extension is
fully supported in Loongson-3A R4+, so we at first add QEMU/KVM support
in this series. And the next series will add QEMU/TCG support (it will
emulate Loongson-3A R1).

We already have a full functional Linux kernel (based on Linux-5.4.x LTS
but not upstream yet) here:

https://github.com/chenhuacai/linux

How to use QEMU/Loongson-3?
1, Download kernel source from the above URL;
2, Build a kernel with arch/mips/configs/loongson3_{def,hpc}config;
3, Boot a Loongson-3A4000 host with this kernel;
4, Build QEMU-5.0.0 with this patchset;
5, modprobe kvm;
6, Use QEMU with TCG (available in future):
       qemu-system-mips64el -M loongson3,accel=tcg -cpu Loongson-3A1000 -kernel <path_to_kernel> -append ... 
   Use QEMU with KVM (available at present): 
       qemu-system-mips64el -M loongson3,accel=kvm -cpu Loongson-3A4000 -kernel <path_to_kernel> -append ... 

   The "-cpu" parameter can be omitted here and QEMU will use the correct type for TCG/KVM automatically.

V1 -> V2:
1, Add a cover letter;
2, Improve CPU definitions;
3, Remove LS7A-related things (Use GPEX instead);
4, Add a description of how to run QEMU/Loongson-3.

V2 -> V3:
1, Fix all possible checkpatch.pl errors and warnings.

V3 -> V4:
1, Sync code with upstream;
2, Remove merged patches;
3, Fix build failure without CONFIG_KVM;
4, Add Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>.

Huacai Chen(4):
 hw/mips: Implement the kvm_type() hook in MachineClass
 target/mips: Add Loongson-3 CPU definition
 hw/mips: Add Loongson-3 machine support (with KVM)
 MAINTAINERS: Add myself as Loongson-3 maintainer

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 MAINTAINERS                          |   5 +
 default-configs/mips64el-softmmu.mak |   1 +
 hw/core/Makefile.objs                |   2 +-
 hw/core/null-machine.c               |   4 +
 hw/mips/Kconfig                      |  10 +
 hw/mips/Makefile.objs                |   3 +-
 hw/mips/common.c                     |  42 ++
 hw/mips/loongson3.c                  | 901 +++++++++++++++++++++++++++++++++++
 include/hw/mips/mips.h               |   3 +
 target/mips/cpu.h                    |  28 ++
 target/mips/internal.h               |   2 +
 target/mips/mips-defs.h              |   7 +-
 target/mips/translate.c              |   2 +
 target/mips/translate_init.inc.c     |  86 ++++
 14 files changed, 1092 insertions(+), 4 deletions(-)
 create mode 100644 hw/mips/common.c
 create mode 100644 hw/mips/loongson3.c
--
2.7.0

Comments

Aleksandar Markovic June 5, 2020, 8:38 a.m. UTC | #1 
уто, 2. јун 2020. у 04:38 Huacai Chen <zltjiangshi@gmail.com> је написао/ла:
>
> Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
> R1/R2.

Hi, Huacai,

The documents you kindly provided contain some valuable info on
Loongson-3A R1/R2/R3/R4 and Loongson-3B R1/R2. However, I
couldn't find detailed instruction-by-instruction specifications.

In fact, I don't need all the details right now, but some form of
overview of instructions sets of Loongson-3A R1/R2/R3/R4 and
Loongson-3B R1/R2. Could you please provide textual description
(one of two paragraph) of supported instructions for each of these
models:

* Loongson-3A R1
* Loongson-3A R2
* Loongson-3A R3
* Loongson-3A R4
* Loongson-3B R1
* Loongson-3B R2

(what is the base instructuin set; the difference to the previous model;
what SIMD extension (LMI/MSA) is supported other specifics around
supported instructions)

Based on your answer I may bring forward some suggestions on the
improvement of v4 of this series.

Truly yours,
Aleksandar

> 1, "Loongson-3A1000" CPU which is corresponding to Loongson-3A R1. It is
>    suitable for TCG because Loongson-3A R1 has fewest ASE.
> 2, "Loongson-3A4000" CPU which is corresponding to Loongson-3A R4. It is
>    suitable for KVM because Loongson-3A R4 has the VZ ASE.
>
> Loongson-3 lacks English documents. I've tried to translated them with
> translate.google.com, and the machine translated documents (together
> with their original Chinese versions) are available here.
>
> Loongson-3A R1 (Loongson-3A1000)
> User Manual Part 1:
> http://ftp.godson.ac.cn/lemote/3A1000_p1.pdf
> http://ftp.godson.ac.cn/lemote/Loongson3A1000_processor_user_manual_P1.pdf (Chinese Version)
> User Manual Part 2:
> http://ftp.godson.ac.cn/lemote/3A1000_p2.pdf
> http://ftp.godson.ac.cn/lemote/Loongson3A1000_processor_user_manual_P2.pdf (Chinese Version)
>
> Loongson-3A R2 (Loongson-3A2000)
> User Manual Part 1:
> http://ftp.godson.ac.cn/lemote/3A2000_p1.pdf
> http://ftp.godson.ac.cn/lemote/Loongson3A2000_user1.pdf (Chinese Version)
> User Manual Part 2:
> http://ftp.godson.ac.cn/lemote/3A2000_p2.pdf
> http://ftp.godson.ac.cn/lemote/Loongson3A2000_user2.pdf (Chinese Version)
>
> Loongson-3A R3 (Loongson-3A3000)
> User Manual Part 1:
> http://ftp.godson.ac.cn/lemote/3A3000_p1.pdf
> http://ftp.godson.ac.cn/lemote/Loongson3A3000_3B3000usermanual1.pdf (Chinese Version)
> User Manual Part 2:
> http://ftp.godson.ac.cn/lemote/3A3000_p2.pdf
> http://ftp.godson.ac.cn/lemote/Loongson3A3000_3B3000usermanual2.pdf (Chinese Version)
>
> Loongson-3A R4 (Loongson-3A4000)
> User Manual Part 1:
> http://ftp.godson.ac.cn/lemote/3A4000_p1.pdf
> http://ftp.godson.ac.cn/lemote/3A4000user.pdf (Chinese Version)
> User Manual Part 2:
> I'm sorry that it is unavailable now.
>
> We are preparing to add QEMU's Loongson-3 support. MIPS VZ extension is
> fully supported in Loongson-3A R4+, so we at first add QEMU/KVM support
> in this series. And the next series will add QEMU/TCG support (it will
> emulate Loongson-3A R1).
>
> We already have a full functional Linux kernel (based on Linux-5.4.x LTS
> but not upstream yet) here:
>
> https://github.com/chenhuacai/linux
>
> How to use QEMU/Loongson-3?
> 1, Download kernel source from the above URL;
> 2, Build a kernel with arch/mips/configs/loongson3_{def,hpc}config;
> 3, Boot a Loongson-3A4000 host with this kernel;
> 4, Build QEMU-5.0.0 with this patchset;
> 5, modprobe kvm;
> 6, Use QEMU with TCG (available in future):
>        qemu-system-mips64el -M loongson3,accel=tcg -cpu Loongson-3A1000 -kernel <path_to_kernel> -append ...
>    Use QEMU with KVM (available at present):
>        qemu-system-mips64el -M loongson3,accel=kvm -cpu Loongson-3A4000 -kernel <path_to_kernel> -append ...
>
>    The "-cpu" parameter can be omitted here and QEMU will use the correct type for TCG/KVM automatically.
>
> V1 -> V2:
> 1, Add a cover letter;
> 2, Improve CPU definitions;
> 3, Remove LS7A-related things (Use GPEX instead);
> 4, Add a description of how to run QEMU/Loongson-3.
>
> V2 -> V3:
> 1, Fix all possible checkpatch.pl errors and warnings.
>
> V3 -> V4:
> 1, Sync code with upstream;
> 2, Remove merged patches;
> 3, Fix build failure without CONFIG_KVM;
> 4, Add Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>.
>
> Huacai Chen(4):
>  hw/mips: Implement the kvm_type() hook in MachineClass
>  target/mips: Add Loongson-3 CPU definition
>  hw/mips: Add Loongson-3 machine support (with KVM)
>  MAINTAINERS: Add myself as Loongson-3 maintainer
>
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
>  MAINTAINERS                          |   5 +
>  default-configs/mips64el-softmmu.mak |   1 +
>  hw/core/Makefile.objs                |   2 +-
>  hw/core/null-machine.c               |   4 +
>  hw/mips/Kconfig                      |  10 +
>  hw/mips/Makefile.objs                |   3 +-
>  hw/mips/common.c                     |  42 ++
>  hw/mips/loongson3.c                  | 901 +++++++++++++++++++++++++++++++++++
>  include/hw/mips/mips.h               |   3 +
>  target/mips/cpu.h                    |  28 ++
>  target/mips/internal.h               |   2 +
>  target/mips/mips-defs.h              |   7 +-
>  target/mips/translate.c              |   2 +
>  target/mips/translate_init.inc.c     |  86 ++++
>  14 files changed, 1092 insertions(+), 4 deletions(-)
>  create mode 100644 hw/mips/common.c
>  create mode 100644 hw/mips/loongson3.c
> --
> 2.7.0
Aleksandar Markovic June 5, 2020, 8:40 a.m. UTC | #2 
Just adding Jiaxun.

пет, 5. јун 2020. у 10:38 Aleksandar Markovic
<aleksandar.qemu.devel@gmail.com> је написао/ла:
>
> уто, 2. јун 2020. у 04:38 Huacai Chen <zltjiangshi@gmail.com> је написао/ла:
> >
> > Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
> > R1/R2.
>
> Hi, Huacai,
>
> The documents you kindly provided contain some valuable info on
> Loongson-3A R1/R2/R3/R4 and Loongson-3B R1/R2. However, I
> couldn't find detailed instruction-by-instruction specifications.
>
> In fact, I don't need all the details right now, but some form of
> overview of instructions sets of Loongson-3A R1/R2/R3/R4 and
> Loongson-3B R1/R2. Could you please provide textual description
> (one of two paragraph) of supported instructions for each of these
> models:
>
> * Loongson-3A R1
> * Loongson-3A R2
> * Loongson-3A R3
> * Loongson-3A R4
> * Loongson-3B R1
> * Loongson-3B R2
>
> (what is the base instructuin set; the difference to the previous model;
> what SIMD extension (LMI/MSA) is supported other specifics around
> supported instructions)
>
> Based on your answer I may bring forward some suggestions on the
> improvement of v4 of this series.
>
> Truly yours,
> Aleksandar
>
> > 1, "Loongson-3A1000" CPU which is corresponding to Loongson-3A R1. It is
> >    suitable for TCG because Loongson-3A R1 has fewest ASE.
> > 2, "Loongson-3A4000" CPU which is corresponding to Loongson-3A R4. It is
> >    suitable for KVM because Loongson-3A R4 has the VZ ASE.
> >
> > Loongson-3 lacks English documents. I've tried to translated them with
> > translate.google.com, and the machine translated documents (together
> > with their original Chinese versions) are available here.
> >
> > Loongson-3A R1 (Loongson-3A1000)
> > User Manual Part 1:
> > http://ftp.godson.ac.cn/lemote/3A1000_p1.pdf
> > http://ftp.godson.ac.cn/lemote/Loongson3A1000_processor_user_manual_P1.pdf (Chinese Version)
> > User Manual Part 2:
> > http://ftp.godson.ac.cn/lemote/3A1000_p2.pdf
> > http://ftp.godson.ac.cn/lemote/Loongson3A1000_processor_user_manual_P2.pdf (Chinese Version)
> >
> > Loongson-3A R2 (Loongson-3A2000)
> > User Manual Part 1:
> > http://ftp.godson.ac.cn/lemote/3A2000_p1.pdf
> > http://ftp.godson.ac.cn/lemote/Loongson3A2000_user1.pdf (Chinese Version)
> > User Manual Part 2:
> > http://ftp.godson.ac.cn/lemote/3A2000_p2.pdf
> > http://ftp.godson.ac.cn/lemote/Loongson3A2000_user2.pdf (Chinese Version)
> >
> > Loongson-3A R3 (Loongson-3A3000)
> > User Manual Part 1:
> > http://ftp.godson.ac.cn/lemote/3A3000_p1.pdf
> > http://ftp.godson.ac.cn/lemote/Loongson3A3000_3B3000usermanual1.pdf (Chinese Version)
> > User Manual Part 2:
> > http://ftp.godson.ac.cn/lemote/3A3000_p2.pdf
> > http://ftp.godson.ac.cn/lemote/Loongson3A3000_3B3000usermanual2.pdf (Chinese Version)
> >
> > Loongson-3A R4 (Loongson-3A4000)
> > User Manual Part 1:
> > http://ftp.godson.ac.cn/lemote/3A4000_p1.pdf
> > http://ftp.godson.ac.cn/lemote/3A4000user.pdf (Chinese Version)
> > User Manual Part 2:
> > I'm sorry that it is unavailable now.
> >
> > We are preparing to add QEMU's Loongson-3 support. MIPS VZ extension is
> > fully supported in Loongson-3A R4+, so we at first add QEMU/KVM support
> > in this series. And the next series will add QEMU/TCG support (it will
> > emulate Loongson-3A R1).
> >
> > We already have a full functional Linux kernel (based on Linux-5.4.x LTS
> > but not upstream yet) here:
> >
> > https://github.com/chenhuacai/linux
> >
> > How to use QEMU/Loongson-3?
> > 1, Download kernel source from the above URL;
> > 2, Build a kernel with arch/mips/configs/loongson3_{def,hpc}config;
> > 3, Boot a Loongson-3A4000 host with this kernel;
> > 4, Build QEMU-5.0.0 with this patchset;
> > 5, modprobe kvm;
> > 6, Use QEMU with TCG (available in future):
> >        qemu-system-mips64el -M loongson3,accel=tcg -cpu Loongson-3A1000 -kernel <path_to_kernel> -append ...
> >    Use QEMU with KVM (available at present):
> >        qemu-system-mips64el -M loongson3,accel=kvm -cpu Loongson-3A4000 -kernel <path_to_kernel> -append ...
> >
> >    The "-cpu" parameter can be omitted here and QEMU will use the correct type for TCG/KVM automatically.
> >
> > V1 -> V2:
> > 1, Add a cover letter;
> > 2, Improve CPU definitions;
> > 3, Remove LS7A-related things (Use GPEX instead);
> > 4, Add a description of how to run QEMU/Loongson-3.
> >
> > V2 -> V3:
> > 1, Fix all possible checkpatch.pl errors and warnings.
> >
> > V3 -> V4:
> > 1, Sync code with upstream;
> > 2, Remove merged patches;
> > 3, Fix build failure without CONFIG_KVM;
> > 4, Add Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>.
> >
> > Huacai Chen(4):
> >  hw/mips: Implement the kvm_type() hook in MachineClass
> >  target/mips: Add Loongson-3 CPU definition
> >  hw/mips: Add Loongson-3 machine support (with KVM)
> >  MAINTAINERS: Add myself as Loongson-3 maintainer
> >
> > Signed-off-by: Huacai Chen <chenhc@lemote.com>
> > ---
> >  MAINTAINERS                          |   5 +
> >  default-configs/mips64el-softmmu.mak |   1 +
> >  hw/core/Makefile.objs                |   2 +-
> >  hw/core/null-machine.c               |   4 +
> >  hw/mips/Kconfig                      |  10 +
> >  hw/mips/Makefile.objs                |   3 +-
> >  hw/mips/common.c                     |  42 ++
> >  hw/mips/loongson3.c                  | 901 +++++++++++++++++++++++++++++++++++
> >  include/hw/mips/mips.h               |   3 +
> >  target/mips/cpu.h                    |  28 ++
> >  target/mips/internal.h               |   2 +
> >  target/mips/mips-defs.h              |   7 +-
> >  target/mips/translate.c              |   2 +
> >  target/mips/translate_init.inc.c     |  86 ++++
> >  14 files changed, 1092 insertions(+), 4 deletions(-)
> >  create mode 100644 hw/mips/common.c
> >  create mode 100644 hw/mips/loongson3.c
> > --
> > 2.7.0
Jiaxun Yang June 5, 2020, 9:05 a.m. UTC | #3 
On Fri, 5 Jun 2020 10:38:36 +0200
Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> wrote:

> уто, 2. јун 2020. у 04:38 Huacai Chen <zltjiangshi@gmail.com> је
> написао/ла:
> >
> > Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and
> > Loongson-3B R1/R2.  
> 
> Hi, Huacai,
> 
> The documents you kindly provided contain some valuable info on
> Loongson-3A R1/R2/R3/R4 and Loongson-3B R1/R2. However, I
> couldn't find detailed instruction-by-instruction specifications.
> 
> In fact, I don't need all the details right now, but some form of
> overview of instructions sets of Loongson-3A R1/R2/R3/R4 and
> Loongson-3B R1/R2. Could you please provide textual description
> (one of two paragraph) of supported instructions for each of these
> models:
> 

Hi Aleksandar,

I'm going to explain this according to the names of vendor specified
ASEs name in GCC & Binutils.

There are some instruction that not covered by public documents, that's
out of our scope so I'm not going to talk them.

Firstly, there are some ASEs not being upstreamed yet:
 - Loongson-AMO (Atomic Opreations, Looks like RISC-V)
 - Loongson-EXT3 (Loongson Extention 3)
 - Loongson-CSR (Core Status Registers, instructions to read some
   private core register, including something called "stable-counter"
   (TSC like timer) and CPUCFG(something like cpuid in x86))

 - MIPS-MSA-Ctypto (Including AES, SHA, MD5 stuff)
 - MIPS MSA2 (256-bit MSA instructions)

And there is a ASE that only being used in kernel so not even being
mentioned in toolchain.
 - Loongson-SPW (LWPTE, LDPTE used to help with pagetable walking)

ALl these processors have mips64r2 as baseline.

> * Loongson-3A R1
Loongson-MMI, Loongson-EXT

> * Loongson-3A R2
Loongson-MMI, Loongson-EXT, Looongson-EXT2, Loongson-SPW, DSP, DSPr2

> * Loongson-3A R3
Same as R2. This revision mainly focus on bugfix and improve clock
speed.

> * Loongson-3A R4
Loongson-MMI, Loongson-EXT, Looongson-EXT2, Loongson-SPW, Loongson-AMO,
Loongson-EXT3, Loongson-CSR, MSA Crypto, MSA2

This processor even support hardware unaligned accessing.

> * Loongson-3B R1
> * Loongson-3B R2
Loongson-3B R1 and R2 are mostly identical with Loongson-3A R1, the
difference is it have 8-cores in a package. It was designed for HPC so
there are some domain specific SIMD instructions, but they're not
available to public.

And a new family member of Loongson64:
Loongson-2K (R1):
Loongson-MMI, Loongson-EXT, Looongson-EXT2, MSA.

> 
> (what is the base instructuin set; the difference to the previous
> model; what SIMD extension (LMI/MSA) is supported other specifics
> around supported instructions)
> 
> Based on your answer I may bring forward some suggestions on the
> improvement of v4 of this series.
> 
> Truly yours,
> Aleksandar
> 

Thank a lot.

- Jiaxun
Huacai Chen June 5, 2020, 9:21 a.m. UTC | #4 
Hi, Jiaxun,

On Fri, Jun 5, 2020 at 5:06 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
>
> On Fri, 5 Jun 2020 10:38:36 +0200
> Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> wrote:
>
> > уто, 2. јун 2020. у 04:38 Huacai Chen <zltjiangshi@gmail.com> је
> > написао/ла:
> > >
> > > Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and
> > > Loongson-3B R1/R2.
> >
> > Hi, Huacai,
> >
> > The documents you kindly provided contain some valuable info on
> > Loongson-3A R1/R2/R3/R4 and Loongson-3B R1/R2. However, I
> > couldn't find detailed instruction-by-instruction specifications.
> >
> > In fact, I don't need all the details right now, but some form of
> > overview of instructions sets of Loongson-3A R1/R2/R3/R4 and
> > Loongson-3B R1/R2. Could you please provide textual description
> > (one of two paragraph) of supported instructions for each of these
> > models:
> >
>
> Hi Aleksandar,
>
> I'm going to explain this according to the names of vendor specified
> ASEs name in GCC & Binutils.
>
> There are some instruction that not covered by public documents, that's
> out of our scope so I'm not going to talk them.
>
> Firstly, there are some ASEs not being upstreamed yet:
>  - Loongson-AMO (Atomic Opreations, Looks like RISC-V)
>  - Loongson-EXT3 (Loongson Extention 3)
>  - Loongson-CSR (Core Status Registers, instructions to read some
>    private core register, including something called "stable-counter"
>    (TSC like timer) and CPUCFG(something like cpuid in x86))
Core Status Registers  shoud be  Configuration Status Register

>
>  - MIPS-MSA-Ctypto (Including AES, SHA, MD5 stuff)
>  - MIPS MSA2 (256-bit MSA instructions)
>
> And there is a ASE that only being used in kernel so not even being
> mentioned in toolchain.
>  - Loongson-SPW (LWPTE, LDPTE used to help with pagetable walking)
>
> ALl these processors have mips64r2 as baseline.
>
> > * Loongson-3A R1
> Loongson-MMI, Loongson-EXT
>
> > * Loongson-3A R2
> Loongson-MMI, Loongson-EXT, Looongson-EXT2, Loongson-SPW, DSP, DSPr2
>
> > * Loongson-3A R3
> Same as R2. This revision mainly focus on bugfix and improve clock
> speed.
>
> > * Loongson-3A R4
> Loongson-MMI, Loongson-EXT, Looongson-EXT2, Loongson-SPW, Loongson-AMO,
> Loongson-EXT3, Loongson-CSR, MSA Crypto, MSA2
>
> This processor even support hardware unaligned accessing.
>
> > * Loongson-3B R1
> > * Loongson-3B R2
> Loongson-3B R1 and R2 are mostly identical with Loongson-3A R1, the
> difference is it have 8-cores in a package. It was designed for HPC so
> there are some domain specific SIMD instructions, but they're not
> available to public.
>
> And a new family member of Loongson64:
> Loongson-2K (R1):
> Loongson-MMI, Loongson-EXT, Looongson-EXT2, MSA.
>
> >
> > (what is the base instructuin set; the difference to the previous
> > model; what SIMD extension (LMI/MSA) is supported other specifics
> > around supported instructions)
> >
> > Based on your answer I may bring forward some suggestions on the
> > improvement of v4 of this series.
> >
> > Truly yours,
> > Aleksandar
> >
>
> Thank a lot.
>
> - Jiaxun
Aleksandar Markovic June 5, 2020, 9:27 a.m. UTC | #5 
11:06 Pet, 05.06.2020. Jiaxun Yang <jiaxun.yang@flygoat.com> је написао/ла:
>
> On Fri, 5 Jun 2020 10:38:36 +0200
> Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> wrote:
>
> > уто, 2. јун 2020. у 04:38 Huacai Chen <zltjiangshi@gmail.com> је
> > написао/ла:
> > >
> > > Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and
> > > Loongson-3B R1/R2.
> >
> > Hi, Huacai,
> >
> > The documents you kindly provided contain some valuable info on
> > Loongson-3A R1/R2/R3/R4 and Loongson-3B R1/R2. However, I
> > couldn't find detailed instruction-by-instruction specifications.
> >
> > In fact, I don't need all the details right now, but some form of
> > overview of instructions sets of Loongson-3A R1/R2/R3/R4 and
> > Loongson-3B R1/R2. Could you please provide textual description
> > (one of two paragraph) of supported instructions for each of these
> > models:
> >
>
> Hi Aleksandar,
>
> I'm going to explain this according to the names of vendor specified
> ASEs name in GCC & Binutils.
>
> There are some instruction that not covered by public documents, that's
> out of our scope so I'm not going to talk them.
>
> Firstly, there are some ASEs not being upstreamed yet:
>  - Loongson-AMO (Atomic Opreations, Looks like RISC-V)
>  - Loongson-EXT3 (Loongson Extention 3)
>  - Loongson-CSR (Core Status Registers, instructions to read some
>    private core register, including something called "stable-counter"
>    (TSC like timer) and CPUCFG(something like cpuid in x86))
>
>  - MIPS-MSA-Ctypto (Including AES, SHA, MD5 stuff)
>  - MIPS MSA2 (256-bit MSA instructions)
>
> And there is a ASE that only being used in kernel so not even being
> mentioned in toolchain.
>  - Loongson-SPW (LWPTE, LDPTE used to help with pagetable walking)
>
> ALl these processors have mips64r2 as baseline.
>
> > * Loongson-3A R1
> Loongson-MMI, Loongson-EXT
>
> > * Loongson-3A R2
> Loongson-MMI, Loongson-EXT, Looongson-EXT2, Loongson-SPW, DSP, DSPr2
>
> > * Loongson-3A R3
> Same as R2. This revision mainly focus on bugfix and improve clock
> speed.
>
> > * Loongson-3A R4
> Loongson-MMI, Loongson-EXT, Looongson-EXT2, Loongson-SPW, Loongson-AMO,
> Loongson-EXT3, Loongson-CSR, MSA Crypto, MSA2
>
> This processor even support hardware unaligned accessing.
>
> > * Loongson-3B R1
> > * Loongson-3B R2
> Loongson-3B R1 and R2 are mostly identical with Loongson-3A R1, the
> difference is it have 8-cores in a package. It was designed for HPC so
> there are some domain specific SIMD instructions, but they're not
> available to public.
>
> And a new family member of Loongson64:
> Loongson-2K (R1):
> Loongson-MMI, Loongson-EXT, Looongson-EXT2, MSA.
>

Thanks for your detailed response, Juaxun.

I will think over the weekend about the new aspects you mentioned here. All
this is valuable info for long-term planning. But also in short-term - for
this very series. Expect my answer early next week.

Best Regards and Best Health!

Aleksandar


> >
> > (what is the base instructuin set; the difference to the previous
> > model; what SIMD extension (LMI/MSA) is supported other specifics
> > around supported instructions)
> >
> > Based on your answer I may bring forward some suggestions on the
> > improvement of v4 of this series.
> >
> > Truly yours,
> > Aleksandar
> >
>
> Thank a lot.
>
> - Jiaxun