Message ID | 20200609160244.4139366-4-noltari@gmail.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | bmips: add bcm6345 reset controller support | expand |
On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote: > Add support for resetting blocks through the Linux reset controller > subsystem for BCM63xx SoCs. > > Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> This looks good to me, however in v1 there was a need for sleeping after the reset assertion, and this does not appear to be taken care of by default by reset-simple.c, did you determine the delay not to be necessary?
Hi Florian, > El 10 jun 2020, a las 3:05, Florian Fainelli <f.fainelli@gmail.com> escribió: > > > > On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote: >> Add support for resetting blocks through the Linux reset controller >> subsystem for BCM63xx SoCs. >> >> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> > > This looks good to me, however in v1 there was a need for sleeping after > the reset assertion, and this does not appear to be taken care of by > default by reset-simple.c, did you determine the delay not to be necessary? Let me do some more tests to determine if it’s really needed. > -- > Florian
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index d9efbfd29646..84d29b585e9b 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -153,7 +153,7 @@ config RESET_SCMI config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST - default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC + default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC || BMIPS_GENERIC help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, @@ -163,6 +163,7 @@ config RESET_SIMPLE - Altera SoCFPGAs - ASPEED BMC SoCs - Bitmain BM1880 SoC + - BMIPS (BCM6345) - Realtek SoCs - RCC reset controller in STM32 MCUs - Allwinner SoCs diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c index 067e7e7b34f1..c00bb65c0b70 100644 --- a/drivers/reset/reset-simple.c +++ b/drivers/reset/reset-simple.c @@ -118,6 +118,7 @@ static const struct reset_simple_devdata reset_simple_active_low = { static const struct of_device_id reset_simple_dt_ids[] = { { .compatible = "altr,stratix10-rst-mgr", .data = &reset_simple_socfpga }, + { .compatible = "brcm,bcm6345-reset" }, { .compatible = "st,stm32-rcc", }, { .compatible = "allwinner,sun6i-a31-clock-reset", .data = &reset_simple_active_low },
Add support for resetting blocks through the Linux reset controller subsystem for BCM63xx SoCs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> --- v2: add compatibility to reset-simple instead of adding a new driver. drivers/reset/Kconfig | 3 ++- drivers/reset/reset-simple.c | 1 + 2 files changed, 3 insertions(+), 1 deletion(-)