| Message ID | 20200610090421.3428945-4-daniel@0x0f.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Initial MStar/Sigmastar ARMv7 SoC support | expand |
Daniel, On 2020-06-10 10:04, Daniel Palmer wrote: > Adds initial dtsi for the base MStar ARMv7 SoCs, family dtsis for > infinity > and mercury families, and then some chip level dtsis for chips in those > families. > > Signed-off-by: Daniel Palmer <daniel@0x0f.com> > --- > MAINTAINERS | 3 + > arch/arm/boot/dts/infinity-msc313.dtsi | 14 +++++ > arch/arm/boot/dts/infinity.dtsi | 10 ++++ > arch/arm/boot/dts/infinity3-msc313e.dtsi | 14 +++++ > arch/arm/boot/dts/infinity3.dtsi | 10 ++++ > arch/arm/boot/dts/mercury5-ssc8336n.dtsi | 14 +++++ > arch/arm/boot/dts/mercury5.dtsi | 10 ++++ > arch/arm/boot/dts/mstar-v7.dtsi | 71 ++++++++++++++++++++++++ > 8 files changed, 146 insertions(+) > create mode 100644 arch/arm/boot/dts/infinity-msc313.dtsi > create mode 100644 arch/arm/boot/dts/infinity.dtsi > create mode 100644 arch/arm/boot/dts/infinity3-msc313e.dtsi > create mode 100644 arch/arm/boot/dts/infinity3.dtsi > create mode 100644 arch/arm/boot/dts/mercury5-ssc8336n.dtsi > create mode 100644 arch/arm/boot/dts/mercury5.dtsi > create mode 100644 arch/arm/boot/dts/mstar-v7.dtsi [...] > diff --git a/arch/arm/boot/dts/mstar-v7.dtsi > b/arch/arm/boot/dts/mstar-v7.dtsi > new file mode 100644 > index 000000000000..0fccc4ca52a4 > --- /dev/null > +++ b/arch/arm/boot/dts/mstar-v7.dtsi > @@ -0,0 +1,71 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2019 thingy.jp. > + * Author: Daniel Palmer <daniel@thingy.jp> > + */ > + > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&gic>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x0>; > + }; > + }; > + > + arch_timer { > + compatible = "arm,armv7-timer"; > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) > + | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) > + | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) > + | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) > + | IRQ_TYPE_LEVEL_LOW)>; > + clock-frequency = <6000000>; This is 2020, and not 2012 anymore. The frequency should be set by your favourite bootloader. > + }; > + > + pmu { > + compatible = "arm,cortex-a7-pmu"; > + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + soc: soc { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + gic: interrupt-controller@16001000 { > + compatible = "arm,cortex-a7-gic"; > + #interrupt-cells = <3>; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-controller; > + reg = <0x16001000 0x1000>, > + <0x16002000 0x1000>; The GICC region is likely to be 8kB, and not 4kB. Missing GICH and GICV regions, as well as the maintenance interrupt. Thanks, M.
Hi, Am 10.06.20 um 11:04 schrieb Daniel Palmer: > Adds initial dtsi for the base MStar ARMv7 SoCs, family dtsis for infinity > and mercury families, and then some chip level dtsis for chips in those > families. > > Signed-off-by: Daniel Palmer <daniel@0x0f.com> > --- > MAINTAINERS | 3 + > arch/arm/boot/dts/infinity-msc313.dtsi | 14 +++++ > arch/arm/boot/dts/infinity.dtsi | 10 ++++ > arch/arm/boot/dts/infinity3-msc313e.dtsi | 14 +++++ > arch/arm/boot/dts/infinity3.dtsi | 10 ++++ > arch/arm/boot/dts/mercury5-ssc8336n.dtsi | 14 +++++ > arch/arm/boot/dts/mercury5.dtsi | 10 ++++ > arch/arm/boot/dts/mstar-v7.dtsi | 71 ++++++++++++++++++++++++ > 8 files changed, 146 insertions(+) Can you split this up into three parts for easier review? > create mode 100644 arch/arm/boot/dts/infinity-msc313.dtsi > create mode 100644 arch/arm/boot/dts/infinity.dtsi > create mode 100644 arch/arm/boot/dts/infinity3-msc313e.dtsi > create mode 100644 arch/arm/boot/dts/infinity3.dtsi > create mode 100644 arch/arm/boot/dts/mercury5-ssc8336n.dtsi > create mode 100644 arch/arm/boot/dts/mercury5.dtsi > create mode 100644 arch/arm/boot/dts/mstar-v7.dtsi > > diff --git a/MAINTAINERS b/MAINTAINERS > index 754521938303..839ae0250d3d 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -2114,6 +2114,9 @@ ARM/MStar/Sigmastar ARMv7 SoC support > M: Daniel Palmer <daniel@thingy.jp> > L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) > S: Maintained > +F: arch/arm/boot/dts/infinity*.dtsi > +F: arch/arm/boot/dts/mercury*.dtsi > +F: arch/arm/boot/dts/mstar-v7.dtsi Sort order wrt D. > F: arch/arm/mach-mstar/ > F: Documentation/devicetree/bindings/arm/mstar.yaml > > diff --git a/arch/arm/boot/dts/infinity-msc313.dtsi b/arch/arm/boot/dts/infinity-msc313.dtsi > new file mode 100644 > index 000000000000..4eb522e6a75d > --- /dev/null > +++ b/arch/arm/boot/dts/infinity-msc313.dtsi > @@ -0,0 +1,14 @@ > +// SPDX-License-Identifier: GPL-2.0 DTs as hardware description should be dual-licensed as either MIT or BSD-2-Clause, similar to the schema. Also, elsewhere, for any code that might get reused for OpenOCD (e.g., clk drivers and low-level init like machine - 2/5) or other non-kernel projects potentially incompatible with GPL-2.0-only, it would be useful to use the -or-later version of the GPL for code sharing - if the sources you used permit that. > +/* > + * Copyright (c) 2019 thingy.jp. 2019-2020? Check elsewhere. > + * Author: Daniel Palmer <daniel@thingy.jp> > + */ > + > +#include "infinity.dtsi" > + > +/ { > + memory { > + device_type = "memory"; > + reg = <0x20000000 0x4000000>; The memory node needs to become memory@20000000 then. > + }; I take it, this RAM is integrated? Maybe add some explanation of what this file is > +}; > diff --git a/arch/arm/boot/dts/infinity.dtsi b/arch/arm/boot/dts/infinity.dtsi > new file mode 100644 > index 000000000000..25d379028689 > --- /dev/null > +++ b/arch/arm/boot/dts/infinity.dtsi > @@ -0,0 +1,10 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2019 thingy.jp. > + * Author: Daniel Palmer <daniel@thingy.jp> > + */ > + > +#include "mstar-v7.dtsi" > + > +/ { > +}; What do you intend to add here? Is it really needed? (same below) Pre-DT-Schema I used to add a compatible property in the .dtsi, to make sure we have at least the SoC's, in case someone neglects to add one in their board's .dts. With DT schema that's no longer valid (if enum/const is required), but Linux would still work better with than without. > diff --git a/arch/arm/boot/dts/infinity3-msc313e.dtsi b/arch/arm/boot/dts/infinity3-msc313e.dtsi > new file mode 100644 > index 000000000000..d0c53153faad > --- /dev/null > +++ b/arch/arm/boot/dts/infinity3-msc313e.dtsi > @@ -0,0 +1,14 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2019 thingy.jp. > + * Author: Daniel Palmer <daniel@thingy.jp> > + */ > + > +#include "infinity3.dtsi" > + > +/ { > + memory { Ditto, unit address missing. > + device_type = "memory"; > + reg = <0x20000000 0x4000000>; > + }; > +}; > diff --git a/arch/arm/boot/dts/infinity3.dtsi b/arch/arm/boot/dts/infinity3.dtsi > new file mode 100644 > index 000000000000..cf5f18a07835 > --- /dev/null > +++ b/arch/arm/boot/dts/infinity3.dtsi > @@ -0,0 +1,10 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2019 thingy.jp. > + * Author: Daniel Palmer <daniel@thingy.jp> > + */ > + > +#include "infinity.dtsi" > + > +/ { > +}; Don't you anticipate incompatibilities between infinity and infinity3, i.e., things you don't want to inherit? Seems a bit optimistic. You can of course overwrite properties, but deleting is more difficult. > diff --git a/arch/arm/boot/dts/mercury5-ssc8336n.dtsi b/arch/arm/boot/dts/mercury5-ssc8336n.dtsi > new file mode 100644 > index 000000000000..7513f903c838 > --- /dev/null > +++ b/arch/arm/boot/dts/mercury5-ssc8336n.dtsi > @@ -0,0 +1,14 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2019 thingy.jp. > + * Author: Daniel Palmer <daniel@thingy.jp> > + */ > + > +#include "mercury5.dtsi" > + > +/ { > + memory { Unit address. > + device_type = "memory"; > + reg = <0x20000000 0x4000000>; > + }; > +}; > diff --git a/arch/arm/boot/dts/mercury5.dtsi b/arch/arm/boot/dts/mercury5.dtsi > new file mode 100644 > index 000000000000..25d379028689 > --- /dev/null > +++ b/arch/arm/boot/dts/mercury5.dtsi > @@ -0,0 +1,10 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2019 thingy.jp. > + * Author: Daniel Palmer <daniel@thingy.jp> > + */ > + > +#include "mstar-v7.dtsi" > + > +/ { > +}; > diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi > new file mode 100644 > index 000000000000..0fccc4ca52a4 > --- /dev/null > +++ b/arch/arm/boot/dts/mstar-v7.dtsi So this is the only file starting with mstar. Have you thought about prefixing infinity/mercury, so that they're grouped together? > @@ -0,0 +1,71 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2019 thingy.jp. > + * Author: Daniel Palmer <daniel@thingy.jp> > + */ > + > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + #address-cells = <1>; > + #size-cells = <1>;> > + interrupt-parent = <&gic>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x0>; > + }; > + }; > + > + arch_timer { > + compatible = "arm,armv7-timer"; > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) > + | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) > + | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) > + | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) > + | IRQ_TYPE_LEVEL_LOW)>; > + clock-frequency = <6000000>; > + }; > + > + pmu { > + compatible = "arm,cortex-a7-pmu"; > + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; Lacking interrupt-affinity. "This property should be present when there is more than a single SPI." To deal with single- vs. dual-core models, you should give the pmu node a label, e.g., arm_pmu used elsewhere, I think. Depending on your preferences you could set it here in common code (less work) or in the SoC-specific .dtsi where you know the number of CPUs for sure (safer to not forget later). > + }; > + > + soc: soc { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; I had been instructed not to use full identity ranges but to exclude RAM ranges for safety reasons. > + > + gic: interrupt-controller@16001000 { > + compatible = "arm,cortex-a7-gic"; > + #interrupt-cells = <3>; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-controller; > + reg = <0x16001000 0x1000>, > + <0x16002000 0x1000>; In addition to Marc's comments, please reorder reg to below compatible for consistency. Suggest to also reorder interrupt-controller before the -cells properties, after reg. > + }; > + > + pm_uart: uart@1f221000 { > + compatible = "ns16550a"; > + reg = <0x1f221000 0x100>; > + reg-shift = <3>; > + clock-frequency = <172000000>; > + status = "disabled"; > + }; If you have any decent manuals for these SoCs, I suggest to check whether there are any internal buses that you may want to model as simple-bus for grouping. In-tree examples include meson and recently merged rtd1195 - it affects the reg addresses and unit addresses via suitable ranges mappings. > + }; > +}; Regards, Andreas
Hi Andreas, On Thu, 11 Jun 2020 at 22:39, Andreas Färber <afaerber@suse.de> wrote: > Can you split this up into three parts for easier review? Understood. Will do. > 2019-2020? Check elsewhere. The patches are originally from 2019. I'll update everything. > > + * Author: Daniel Palmer <daniel@thingy.jp> > > + */ > > + > > +#include "infinity.dtsi" > > + > > +/ { > > + memory { > > + device_type = "memory"; > > + reg = <0x20000000 0x4000000>; > > The memory node needs to become memory@20000000 then. > > > + }; > > I take it, this RAM is integrated? Maybe add some explanation of what > this file is Yes. The memory is integrated and the size depends on the specific chips so the memory node is at the chip level dtsi and not the board level. > > +}; > > diff --git a/arch/arm/boot/dts/infinity.dtsi b/arch/arm/boot/dts/infinity.dtsi > > new file mode 100644 > > index 000000000000..25d379028689 > > --- /dev/null > > +++ b/arch/arm/boot/dts/infinity.dtsi > > @@ -0,0 +1,10 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (c) 2019 thingy.jp. > > + * Author: Daniel Palmer <daniel@thingy.jp> > > + */ > > + > > +#include "mstar-v7.dtsi" > > + > > +/ { > > +}; > > What do you intend to add here? Is it really needed? (same below) The specific nodes will go into there. This is mostly an artefact of splitting the device trees out of a more developed tree. > > new file mode 100644 > > index 000000000000..cf5f18a07835 > > --- /dev/null > > +++ b/arch/arm/boot/dts/infinity3.dtsi > > @@ -0,0 +1,10 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (c) 2019 thingy.jp. > > + * Author: Daniel Palmer <daniel@thingy.jp> > > + */ > > + > > +#include "infinity.dtsi" > > + > > +/ { > > +}; > > Don't you anticipate incompatibilities between infinity and infinity3, > i.e., things you don't want to inherit? Seems a bit optimistic. You can > of course overwrite properties, but deleting is more difficult. In my tree with drivers for the rest of the hardware it hasn't been a problem. So far I've found infinity, infinity2, infinity3, infinity5 and infinity6 chips. The memory map for them is almost identical and the changes are adding in more copies of things like DMA controllers, extra clock blocks etc. Having infinity.dtsi as the base for the newer versions should avoid having duplication of nodes that aren't common on the mstar armv7 level but are common to the infinity subtypes. There are two good examples of this: For infinity? the USB and SD controllers are at the same place for all of the chips I've found so far. Unfortunately, despite using the same IP block and the same driver those blocks are in different places in the mercury5. At the moment with all of the infinity chips pulling in infinity.dtsi those nodes are only in infinity.dtsi and mercury5.dtsi. If infinity?.dtsi are all stacked on top of the mstarv7.dtsi base then there will be a number of copies of the same nodes. > > diff --git a/arch/arm/boot/dts/mercury5.dtsi b/arch/arm/boot/dts/mercury5.dtsi > > new file mode 100644 > > index 000000000000..25d379028689 > > --- /dev/null > > +++ b/arch/arm/boot/dts/mercury5.dtsi > > @@ -0,0 +1,10 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (c) 2019 thingy.jp. > > + * Author: Daniel Palmer <daniel@thingy.jp> > > + */ > > + > > +#include "mstar-v7.dtsi" > > + > > +/ { > > +}; > > diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi > > new file mode 100644 > > index 000000000000..0fccc4ca52a4 > > --- /dev/null > > +++ b/arch/arm/boot/dts/mstar-v7.dtsi > > So this is the only file starting with mstar. Have you thought about > prefixing infinity/mercury, so that they're grouped together? I have been thinking about that. I didn't see any other dts in arm that had the vendor as a prefix though. With arm64 everything is in per vendor subdirectories to achieve the same thing. > > + }; > > + > > + pm_uart: uart@1f221000 { > > + compatible = "ns16550a"; > > + reg = <0x1f221000 0x100>; > > + reg-shift = <3>; > > + clock-frequency = <172000000>; > > + status = "disabled"; > > + }; > > If you have any decent manuals for these SoCs, Everything so far has been reverse engineered from an old 3.18 kernel, poking with a multimeter etc. I wish I had a decent manual. > I suggest to check whether there are any internal buses that you may > want to model as simple-bus for grouping. In-tree examples include meson > and recently merged rtd1195 - it affects the reg addresses and unit addresses via > suitable ranges mappings. There is a bridge that is between the CPU and the peripheral registers that doesn't quite fit simple-bus (from what I remember it needs a clk). My plan was to introduce the thin driver for that bus (it just consumes the clks it needs so they don't get disabled at the moment) after introducing the clk support. Thanks, Daniel
Hi, Am 11.06.20 um 16:19 schrieb Daniel Palmer: > On Thu, 11 Jun 2020 at 22:39, Andreas Färber <afaerber@suse.de> wrote: >>> diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi >>> new file mode 100644 >>> index 000000000000..0fccc4ca52a4 >>> --- /dev/null >>> +++ b/arch/arm/boot/dts/mstar-v7.dtsi >> >> So this is the only file starting with mstar. Have you thought about >> prefixing infinity/mercury, so that they're grouped together? > > I have been thinking about that. I didn't see any other dts in arm that had > the vendor as a prefix though. With arm64 everything is in per vendor > subdirectories > to achieve the same thing. qcom- and arm- are examples. Admittedly outliers, but for a new target you don't have all the historical backwards-compatibility baggage. The downside would be if someone wanted to add newer sstar chips under the new name later, then they wouldn't be grouped with predecessor families. Right now it seems like mercury and infinity are not that different, so I figured it might be useful for people contributing patches to see that changes in one might require review of the other. Cheers, Andreas
Hi Andreas, On Thu, 11 Jun 2020 at 23:39, Andreas Färber <afaerber@suse.de> wrote: > The downside would be if someone wanted to add newer sstar chips under > the new name later, then they wouldn't be grouped with predecessor > families. Right now it seems like mercury and infinity are not that > different, so I figured it might be useful for people contributing > patches to see that changes in one might require review of the other. I've thought about this too. One thing I considered was not using mstar or sstar at all and doing the same thing as sunxi and using either the "chenxing" (MorningStar, MStar) or "xingchen" (SigmaStar) moniker instead. However, there are lots of kernel dumps from MStar based TVs etc in the wild already that are using the mstar prefix so just continuing to use that seems like the right thing to do. Thanks, Daniel
diff --git a/MAINTAINERS b/MAINTAINERS index 754521938303..839ae0250d3d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2114,6 +2114,9 @@ ARM/MStar/Sigmastar ARMv7 SoC support M: Daniel Palmer <daniel@thingy.jp> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained +F: arch/arm/boot/dts/infinity*.dtsi +F: arch/arm/boot/dts/mercury*.dtsi +F: arch/arm/boot/dts/mstar-v7.dtsi F: arch/arm/mach-mstar/ F: Documentation/devicetree/bindings/arm/mstar.yaml diff --git a/arch/arm/boot/dts/infinity-msc313.dtsi b/arch/arm/boot/dts/infinity-msc313.dtsi new file mode 100644 index 000000000000..4eb522e6a75d --- /dev/null +++ b/arch/arm/boot/dts/infinity-msc313.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + */ + +#include "infinity.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x20000000 0x4000000>; + }; +}; diff --git a/arch/arm/boot/dts/infinity.dtsi b/arch/arm/boot/dts/infinity.dtsi new file mode 100644 index 000000000000..25d379028689 --- /dev/null +++ b/arch/arm/boot/dts/infinity.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + */ + +#include "mstar-v7.dtsi" + +/ { +}; diff --git a/arch/arm/boot/dts/infinity3-msc313e.dtsi b/arch/arm/boot/dts/infinity3-msc313e.dtsi new file mode 100644 index 000000000000..d0c53153faad --- /dev/null +++ b/arch/arm/boot/dts/infinity3-msc313e.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + */ + +#include "infinity3.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x20000000 0x4000000>; + }; +}; diff --git a/arch/arm/boot/dts/infinity3.dtsi b/arch/arm/boot/dts/infinity3.dtsi new file mode 100644 index 000000000000..cf5f18a07835 --- /dev/null +++ b/arch/arm/boot/dts/infinity3.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + */ + +#include "infinity.dtsi" + +/ { +}; diff --git a/arch/arm/boot/dts/mercury5-ssc8336n.dtsi b/arch/arm/boot/dts/mercury5-ssc8336n.dtsi new file mode 100644 index 000000000000..7513f903c838 --- /dev/null +++ b/arch/arm/boot/dts/mercury5-ssc8336n.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + */ + +#include "mercury5.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x20000000 0x4000000>; + }; +}; diff --git a/arch/arm/boot/dts/mercury5.dtsi b/arch/arm/boot/dts/mercury5.dtsi new file mode 100644 index 000000000000..25d379028689 --- /dev/null +++ b/arch/arm/boot/dts/mercury5.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + */ + +#include "mstar-v7.dtsi" + +/ { +}; diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi new file mode 100644 index 000000000000..0fccc4ca52a4 --- /dev/null +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + }; + }; + + arch_timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) + | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) + | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) + | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) + | IRQ_TYPE_LEVEL_LOW)>; + clock-frequency = <6000000>; + }; + + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; + }; + + soc: soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gic: interrupt-controller@16001000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + interrupt-controller; + reg = <0x16001000 0x1000>, + <0x16002000 0x1000>; + }; + + pm_uart: uart@1f221000 { + compatible = "ns16550a"; + reg = <0x1f221000 0x100>; + reg-shift = <3>; + clock-frequency = <172000000>; + status = "disabled"; + }; + }; +};
Adds initial dtsi for the base MStar ARMv7 SoCs, family dtsis for infinity and mercury families, and then some chip level dtsis for chips in those families. Signed-off-by: Daniel Palmer <daniel@0x0f.com> --- MAINTAINERS | 3 + arch/arm/boot/dts/infinity-msc313.dtsi | 14 +++++ arch/arm/boot/dts/infinity.dtsi | 10 ++++ arch/arm/boot/dts/infinity3-msc313e.dtsi | 14 +++++ arch/arm/boot/dts/infinity3.dtsi | 10 ++++ arch/arm/boot/dts/mercury5-ssc8336n.dtsi | 14 +++++ arch/arm/boot/dts/mercury5.dtsi | 10 ++++ arch/arm/boot/dts/mstar-v7.dtsi | 71 ++++++++++++++++++++++++ 8 files changed, 146 insertions(+) create mode 100644 arch/arm/boot/dts/infinity-msc313.dtsi create mode 100644 arch/arm/boot/dts/infinity.dtsi create mode 100644 arch/arm/boot/dts/infinity3-msc313e.dtsi create mode 100644 arch/arm/boot/dts/infinity3.dtsi create mode 100644 arch/arm/boot/dts/mercury5-ssc8336n.dtsi create mode 100644 arch/arm/boot/dts/mercury5.dtsi create mode 100644 arch/arm/boot/dts/mstar-v7.dtsi