diff mbox series

arm64: dts: rockchip: fix rk3368-lion gmac reset gpio

Message ID 20200607212909.920575-1-heiko@sntech.de (mailing list archive)
State New, archived
Headers show
Series arm64: dts: rockchip: fix rk3368-lion gmac reset gpio | expand

Commit Message

Heiko Stuebner June 7, 2020, 9:29 p.m. UTC 
From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

The lion gmac node currently uses opposite active-values for the
gmac phy reset pin. The gpio-declaration uses active-high while the
separate snps,reset-active-low property marks the pin as active low.

While on the kernel side this works ok, other DT users may get
confused - as seen with uboot right now.

So bring this in line and make both properties match, similar to the
other Rockchip board.

Fixes: d99a02bcfa81 ("arm64: dts: rockchip: add RK3368-uQ7 (Lion) SoM")
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
---
 arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Heiko Stuebner June 17, 2020, 8:37 a.m. UTC | #1 
On Sun, 7 Jun 2020 23:29:09 +0200, Heiko Stuebner wrote:
> The lion gmac node currently uses opposite active-values for the
> gmac phy reset pin. The gpio-declaration uses active-high while the
> separate snps,reset-active-low property marks the pin as active low.
> 
> While on the kernel side this works ok, other DT users may get
> confused - as seen with uboot right now.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: rockchip: fix rk3368-lion gmac reset gpio
      commit: 2300e6dab473e93181cf76e4fe6671aa3d24c57b

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi
index a53de05b5c80..0a137df1ed40 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi
@@ -157,7 +157,7 @@  &gmac {
 	pinctrl-0 = <&rgmii_pins>;
 	snps,reset-active-low;
 	snps,reset-delays-us = <0 10000 50000>;
-	snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
+	snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
 	tx_delay = <0x10>;
 	rx_delay = <0x10>;
 	status = "okay";