| Message ID | 20200616073359.2999656-1-jiaxun.yang@flygoat.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | target/mips: Add two groups of loongson-ext instructions | expand |
уторак, 16. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com> је написао/ла: > This is the sucessor of: > "Basic TCG Loongson-3A1000 Support" > > Thanks! > > Hi, Jiaxun. Thanks for providing updated version of the series. I wonder, given so many "#if defined(TARGET_MIPS64)" lines in this series, what would be the 32-bit processors that support Loongson EXT ASE? Thanks, Aleksandar > Jiaxun Yang (2): > target/mips: Add loongson-ext lsdc2 group of instructions > target/mips: Add loongson-ext lswc2 group of instrustions > > Also, a spelling mistake in the second title. > target/mips/translate.c | 437 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 437 insertions(+) > > -- > 2.27.0.rc2 > >
在 2020/6/16 18:38, Aleksandar Markovic 写道: > > > уторак, 16. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com > <mailto:jiaxun.yang@flygoat.com>> је написао/ла: > > This is the sucessor of: > "Basic TCG Loongson-3A1000 Support" > > Thanks! > > > Hi, Jiaxun. > > Thanks for providing updated version of the series. > > I wonder, given so many "#if defined(TARGET_MIPS64)" lines in this > series, what would be the 32-bit processors that support Loongson EXT ASE? Loongson GS232 core which can be found in Loongson-1A/B/C should support it. Although I have no intension to work on QEMU support of these processors. > > Thanks, > Aleksandar > > Jiaxun Yang (2): > target/mips: Add loongson-ext lsdc2 group of instructions > target/mips: Add loongson-ext lswc2 group of instrustions > > > Also, a spelling mistake in the second title. Ahh, My bad.... > > target/mips/translate.c | 437 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 437 insertions(+) > > -- > 2.27.0.rc2 >
уторак, 16. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com> је написао/ла: > > > 在 2020/6/16 18:38, Aleksandar Markovic 写道: > >> >> >> уторак, 16. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com <mailto: >> jiaxun.yang@flygoat.com>> је написао/ла: >> >> This is the sucessor of: >> "Basic TCG Loongson-3A1000 Support" >> >> Thanks! >> >> >> Hi, Jiaxun. >> >> Thanks for providing updated version of the series. >> >> I wonder, given so many "#if defined(TARGET_MIPS64)" lines in this >> series, what would be the 32-bit processors that support Loongson EXT ASE? >> > > Loongson GS232 core which can be found in Loongson-1A/B/C should support > it. > Although I have no intension to work on QEMU support of these processors. > > ...And, for the sake of accuracy, you nevertheless included the correct implementation (for both 32-bir and 64-bit). That is very good. I would do the same, if I were you. However, there is a problem. We can't upstream (at least not in QEMU for MIPS) anything without the proper documentation. So, please provide the links or attach the supporting files to the cover letter in v2. You already did something similar in some of your previous series and patches. I am perfectly fine with machine translation from Chinese. For example, you need to provide, among other things, docs describing EXT support in GS 232 cores. We can't just make assumptions, or trust your word. These sources of information should be repeated for all versions (v2, v3,...) of the series, in their cover letters. I salute your series, but it needs much more justification. Yours, Aleksandar > >> Thanks, >> Aleksandar >> >> Jiaxun Yang (2): >> target/mips: Add loongson-ext lsdc2 group of instructions >> target/mips: Add loongson-ext lswc2 group of instrustions >> >> >> Also, a spelling mistake in the second title. >> > > Ahh, My bad.... > > >> target/mips/translate.c | 437 ++++++++++++++++++++++++++++++ >> ++++++++++ >> 1 file changed, 437 insertions(+) >> >> -- 2.27.0.rc2 >> >> > -- > - Jiaxun >
在 2020/6/16 22:41, Aleksandar Markovic 写道: > > > уторак, 16. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com > <mailto:jiaxun.yang@flygoat.com>> је написао/ла: > > > > 在 2020/6/16 18:38, Aleksandar Markovic 写道: > > > > уторак, 16. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com > <mailto:jiaxun.yang@flygoat.com> <mailto:jiaxun.yang@flygoat.com > <mailto:jiaxun.yang@flygoat.com>>> је написао/ла: > > This is the sucessor of: > "Basic TCG Loongson-3A1000 Support" > > Thanks! > > > Hi, Jiaxun. > > Thanks for providing updated version of the series. > > I wonder, given so many "#if defined(TARGET_MIPS64)" lines in > this series, what would be the 32-bit processors that support > Loongson EXT ASE? > > > Loongson GS232 core which can be found in Loongson-1A/B/C should > support it. > Although I have no intension to work on QEMU support of these > processors. > > > ...And, for the sake of accuracy, you nevertheless included the correct > implementation (for both 32-bir and 64-bit). That is very good. I would > do the same, if I were you. > > However, there is a problem. We can't upstream (at least not in QEMU for > MIPS) anything without the proper documentation. > > So, please provide the links or attach the supporting files to the cover > letter in v2. You already did something similar in some of your previous > series and patches. I am perfectly fine with machine translation from > Chinese. > > For example, you need to provide, among other things, docs describing > EXT support in GS 232 cores. We can't just make assumptions, or trust > your word. These sources of information should be repeated for all > versions (v2, v3,...) of the series, in their cover letters. I'll attach necessary information about these instructions in next version, however, there is no public document avilable for GS232 core. That's why I'm not intend to upstream it for now. Should I keep these code as is? Ot just filter all Loongson EXT out for MIPS32. Thanks. > > I salute your series, but it needs much more justification. > > Yours, > Aleksandar > > > Thanks, > Aleksandar > > Jiaxun Yang (2): > target/mips: Add loongson-ext lsdc2 group of instructions > target/mips: Add loongson-ext lswc2 group of instrustions > > > Also, a spelling mistake in the second title. > > > Ahh, My bad.... > > > target/mips/translate.c | 437 > ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 437 insertions(+) > > -- 2.27.0.rc2 > > > -- > - Jiaxun >
среда, 17. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com> је написао/ла: > > > 在 2020/6/16 22:41, Aleksandar Markovic 写道: > >> >> >> уторак, 16. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com <mailto: >> jiaxun.yang@flygoat.com>> је написао/ла: >> >> >> >> 在 2020/6/16 18:38, Aleksandar Markovic 写道: >> >> >> >> уторак, 16. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com >> <mailto:jiaxun.yang@flygoat.com> <mailto:jiaxun.yang@flygoat.com >> <mailto:jiaxun.yang@flygoat.com>>> је написао/ла: >> >> This is the sucessor of: >> "Basic TCG Loongson-3A1000 Support" >> >> Thanks! >> >> >> Hi, Jiaxun. >> >> Thanks for providing updated version of the series. >> >> I wonder, given so many "#if defined(TARGET_MIPS64)" lines in >> this series, what would be the 32-bit processors that support >> Loongson EXT ASE? >> >> >> Loongson GS232 core which can be found in Loongson-1A/B/C should >> support it. >> Although I have no intension to work on QEMU support of these >> processors. >> >> >> ...And, for the sake of accuracy, you nevertheless included the correct >> implementation (for both 32-bir and 64-bit). That is very good. I would do >> the same, if I were you. >> >> However, there is a problem. We can't upstream (at least not in QEMU for >> MIPS) anything without the proper documentation. >> >> So, please provide the links or attach the supporting files to the cover >> letter in v2. You already did something similar in some of your previous >> series and patches. I am perfectly fine with machine translation from >> Chinese. >> >> For example, you need to provide, among other things, docs describing EXT >> support in GS 232 cores. We can't just make assumptions, or trust your >> word. These sources of information should be repeated for all versions (v2, >> v3,...) of the series, in their cover letters. >> > > I'll attach necessary information about these instructions in next > version, however, there is no public document avilable for GS232 core. > That's why I'm not intend to upstream it for now. > > Should I keep these code as is? Ot just filter all Loongson EXT out for > MIPS32. > > Sorry for late response, Jiaxun, I got carried away with other things. I am not sure, I simply don't have access to the appropriate info. at this moment, I'd say you can keep (for now) the "ifdef"-ed code for handling 32-bit, since it will never be actually used. But, how do you know the code is correct, if there is no doc? How do you know about specifics of 32-bit ext? Is it just guessing, or more than that? Mention the source of information in commit messages, if any. Or say this is just a guess. A short comment should be added about handling for 32-bit just before the main functions that handle Loongson EXT, just like Richard did for those instructions from LMMI that he could not find proper documentation. Also, can you mention what is achieved by having EXT in QEMU? What Longson-related scenarion would work, that previously (currently) would not? Thanks for this nice series, and all valuable efforts, hopefully we will resolve documentation issue in comming days or weeks. Aleksandar > Thanks. > > >> I salute your series, but it needs much more justification. >> >> Yours, >> Aleksandar >> >> >> Thanks, >> Aleksandar >> >> Jiaxun Yang (2): >> target/mips: Add loongson-ext lsdc2 group of instructions >> target/mips: Add loongson-ext lswc2 group of instrustions >> >> >> Also, a spelling mistake in the second title. >> >> >> Ahh, My bad.... >> >> >> target/mips/translate.c | 437 >> ++++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 437 insertions(+) >> >> -- 2.27.0.rc2 >> >> >> -- - Jiaxun >> >> > -- > - Jiaxun >
在 2020/6/18 20:00, Aleksandar Markovic 写道: > > > среда, 17. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com > <mailto:jiaxun.yang@flygoat.com>> је написао/ла: > > > > 在 2020/6/16 22:41, Aleksandar Markovic 写道: > > > > уторак, 16. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com > <mailto:jiaxun.yang@flygoat.com> <mailto:jiaxun.yang@flygoat.com > <mailto:jiaxun.yang@flygoat.com>>> је написао/ла: > > > > 在 2020/6/16 18:38, Aleksandar Markovic 写道: > > > > уторак, 16. јун 2020., Jiaxun Yang > <jiaxun.yang@flygoat.com <mailto:jiaxun.yang@flygoat.com> > <mailto:jiaxun.yang@flygoat.com > <mailto:jiaxun.yang@flygoat.com>> > <mailto:jiaxun.yang@flygoat.com <mailto:jiaxun.yang@flygoat.com> > <mailto:jiaxun.yang@flygoat.com > <mailto:jiaxun.yang@flygoat.com>>>> је написао/ла: > > This is the sucessor of: > "Basic TCG Loongson-3A1000 Support" > > Thanks! > > > Hi, Jiaxun. > > Thanks for providing updated version of the series. > > I wonder, given so many "#if defined(TARGET_MIPS64)" > lines in > this series, what would be the 32-bit processors that > support > Loongson EXT ASE? > > > Loongson GS232 core which can be found in Loongson-1A/B/C > should > support it. > Although I have no intension to work on QEMU support of these > processors. > > > ...And, for the sake of accuracy, you nevertheless included the > correct implementation (for both 32-bir and 64-bit). That is > very good. I would do the same, if I were you. > > However, there is a problem. We can't upstream (at least not in > QEMU for MIPS) anything without the proper documentation. > > So, please provide the links or attach the supporting files to > the cover letter in v2. You already did something similar in > some of your previous series and patches. I am perfectly fine > with machine translation from Chinese. > > For example, you need to provide, among other things, docs > describing EXT support in GS 232 cores. We can't just make > assumptions, or trust your word. These sources of information > should be repeated for all versions (v2, v3,...) of the series, > in their cover letters. > > > I'll attach necessary information about these instructions in next > version, however, there is no public document avilable for GS232 core. > That's why I'm not intend to upstream it for now. > > Should I keep these code as is? Ot just filter all Loongson EXT out > for MIPS32. > > > Sorry for late response, Jiaxun, I got carried away with other things. > > I am not sure, I simply don't have access to the appropriate info. at > this moment, I'd say you can keep (for now) the "ifdef"-ed code for > handling 32-bit, since it will never be actually used. > > But, how do you know the code is correct, if there is no doc? How do you > know about specifics of 32-bit ext? Is it just guessing, or more than > that? Mention the source of information in commit messages, if any. Or > say this is just a guess. By guess and experiments on real hardware.... > > A short comment should be added about handling for 32-bit just before > the main functions that handle Loongson EXT, just like Richard did for > those instructions from LMMI that he could not find proper documentation. Will do. > > Also, can you mention what is achieved by having EXT in QEMU? What > Longson-related scenarion would work, that previously (currently) would not? > As most applications targeting Loongson processor including Kernel are compiled -march=loongson3a CFLAG, without supoorting these instructions these applications can never run properly. I'll mention them in next version of cover letter. Probably tomorrow. > Thanks for this nice series, and all valuable efforts, hopefully we will > resolve documentation issue in comming days or weeks. Thanks, and wish you all health! > > Aleksandar > > > > Thanks. > > > I salute your series, but it needs much more justification. > > Yours, > Aleksandar > > > Thanks, > Aleksandar > > Jiaxun Yang (2): > target/mips: Add loongson-ext lsdc2 group of > instructions > target/mips: Add loongson-ext lswc2 group of > instrustions > > > Also, a spelling mistake in the second title. > > > Ahh, My bad.... > > > target/mips/translate.c | 437 > ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 437 insertions(+) > > -- 2.27.0.rc2 > > > -- - Jiaxun > > > -- > - Jiaxun >