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[6/6] arm64: defconfig: Enable Qualcomm IPCC driver

Message ID 20200622222747.717306-7-bjorn.andersson@linaro.org (mailing list archive)
State New, archived
Headers show
Series arm64: dts: qcom: Enable SM8250 remoteprocs | expand

Commit Message

Bjorn Andersson June 22, 2020, 10:27 p.m. UTC 
The IPCC hardware block provides a mechanism for triggering interrupts
between co-processors in recent Qualcomm SoCs. This is used as basis for
most form of communication between co-processors, so enable this
support.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

Comments

Manivannan Sadhasivam June 23, 2020, 2:56 a.m. UTC | #1 
On Mon, Jun 22, 2020 at 03:27:47PM -0700, Bjorn Andersson wrote:
> The IPCC hardware block provides a mechanism for triggering interrupts
> between co-processors in recent Qualcomm SoCs. This is used as basis for
> most form of communication between co-processors, so enable this
> support.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

Thanks,
Mani

> ---
>  arch/arm64/configs/defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 5848799dcad0..b3d13e1a052a 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -834,6 +834,7 @@ CONFIG_IMX_MBOX=y
>  CONFIG_PLATFORM_MHU=y
>  CONFIG_BCM2835_MBOX=y
>  CONFIG_QCOM_APCS_IPC=y
> +CONFIG_QCOM_IPCC=y
>  CONFIG_ROCKCHIP_IOMMU=y
>  CONFIG_TEGRA_IOMMU_SMMU=y
>  CONFIG_ARM_SMMU=y
> -- 
> 2.26.2
>
diff mbox series

Patch

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 5848799dcad0..b3d13e1a052a 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -834,6 +834,7 @@  CONFIG_IMX_MBOX=y
 CONFIG_PLATFORM_MHU=y
 CONFIG_BCM2835_MBOX=y
 CONFIG_QCOM_APCS_IPC=y
+CONFIG_QCOM_IPCC=y
 CONFIG_ROCKCHIP_IOMMU=y
 CONFIG_TEGRA_IOMMU_SMMU=y
 CONFIG_ARM_SMMU=y