| Message ID | 20200525164817.2938638-1-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] soc: qcom: socinfo: add support for newer socinfo data | expand |
On Mon 25 May 09:48 PDT 2020, Dmitry Baryshkov wrote: > Add support for newer Qualcomm SoC info structures (up to version 0.15). > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/soc/qcom/socinfo.c | 55 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > > diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c > index ebb49aee179b..0e6adf1161c0 100644 > --- a/drivers/soc/qcom/socinfo.c > +++ b/drivers/soc/qcom/socinfo.c > @@ -24,6 +24,7 @@ > #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff)) > > #define SMEM_SOCINFO_BUILD_ID_LENGTH 32 > +#define SMEM_SOCINFO_CHIP_ID_LENGTH 32 > > /* > * SMEM item id, used to acquire handles to respective > @@ -121,6 +122,16 @@ struct socinfo { > __le32 chip_family; > __le32 raw_device_family; > __le32 raw_device_num; > + /* Version 13 */ > + __le32 nproduct_id; > + char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH]; > + /* Version 14 */ > + __le32 num_clusters; > + __le32 ncluster_array_offset; > + __le32 num_defective_parts; > + __le32 ndefective_parts_array_offset; > + /* Version 15 */ > + __le32 nmodem_supported; > }; > > #ifdef CONFIG_DEBUG_FS > @@ -135,6 +146,12 @@ struct socinfo_params { > u32 raw_ver; > u32 hw_plat; > u32 fmt; > + u32 nproduct_id; > + u32 num_clusters; > + u32 ncluster_array_offset; > + u32 num_defective_parts; > + u32 ndefective_parts_array_offset; > + u32 nmodem_supported; > }; > > struct smem_image_version { > @@ -268,9 +285,19 @@ static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) > return 0; > } > > +static int qcom_show_chip_id(struct seq_file *seq, void *p) > +{ > + struct socinfo *socinfo = seq->private; > + > + seq_printf(seq, "%s\n", socinfo->chip_id); > + > + return 0; > +} > + > QCOM_OPEN(build_id, qcom_show_build_id); > QCOM_OPEN(pmic_model, qcom_show_pmic_model); > QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); > +QCOM_OPEN(chip_id, qcom_show_chip_id); > > #define DEFINE_IMAGE_OPS(type) \ > static int show_image_##type(struct seq_file *seq, void *p) \ > @@ -309,6 +336,34 @@ static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, > qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); > > switch (qcom_socinfo->info.fmt) { > + case SOCINFO_VERSION(0, 15): > + qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported); > + > + debugfs_create_u32("nmodem_supported", 0400, qcom_socinfo->dbg_root, > + &qcom_socinfo->info.nmodem_supported); > + /* Fall through */ > + case SOCINFO_VERSION(0, 14): > + qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters); > + qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset); > + qcom_socinfo->info.num_defective_parts = __le32_to_cpu(info->num_defective_parts); > + qcom_socinfo->info.ndefective_parts_array_offset = __le32_to_cpu(info->ndefective_parts_array_offset); > + > + debugfs_create_u32("num_clusters", 0400, qcom_socinfo->dbg_root, > + &qcom_socinfo->info.num_clusters); > + debugfs_create_u32("ncluster_array_offset", 0400, qcom_socinfo->dbg_root, > + &qcom_socinfo->info.ncluster_array_offset); > + debugfs_create_u32("num_defective_parts", 0400, qcom_socinfo->dbg_root, > + &qcom_socinfo->info.num_defective_parts); > + debugfs_create_u32("ndefective_parts_array_offset", 0400, qcom_socinfo->dbg_root, > + &qcom_socinfo->info.ndefective_parts_array_offset); > + /* Fall through */ > + case SOCINFO_VERSION(0, 13): > + qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id); > + > + debugfs_create_u32("nproduct_id", 0400, qcom_socinfo->dbg_root, > + &qcom_socinfo->info.nproduct_id); > + DEBUGFS_ADD(info, chip_id); > + /* Fall through */ > case SOCINFO_VERSION(0, 12): > qcom_socinfo->info.chip_family = > __le32_to_cpu(info->chip_family); > -- > 2.26.2 >
On Fri, 29 May 2020 at 05:36, Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > > On Mon 25 May 09:48 PDT 2020, Dmitry Baryshkov wrote: > > > Add support for newer Qualcomm SoC info structures (up to version 0.15). > > > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Gratuitous ping for these four patches.
On Mon 22 Jun 01:38 PDT 2020, Dmitry Baryshkov wrote: > On Fri, 29 May 2020 at 05:36, Bjorn Andersson > <bjorn.andersson@linaro.org> wrote: > > > > On Mon 25 May 09:48 PDT 2020, Dmitry Baryshkov wrote: > > > > > Add support for newer Qualcomm SoC info structures (up to version 0.15). > > > > > > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > Gratuitous ping for these four patches. > Thanks for the ping, series now applied.
diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index ebb49aee179b..0e6adf1161c0 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -24,6 +24,7 @@ #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff)) #define SMEM_SOCINFO_BUILD_ID_LENGTH 32 +#define SMEM_SOCINFO_CHIP_ID_LENGTH 32 /* * SMEM item id, used to acquire handles to respective @@ -121,6 +122,16 @@ struct socinfo { __le32 chip_family; __le32 raw_device_family; __le32 raw_device_num; + /* Version 13 */ + __le32 nproduct_id; + char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH]; + /* Version 14 */ + __le32 num_clusters; + __le32 ncluster_array_offset; + __le32 num_defective_parts; + __le32 ndefective_parts_array_offset; + /* Version 15 */ + __le32 nmodem_supported; }; #ifdef CONFIG_DEBUG_FS @@ -135,6 +146,12 @@ struct socinfo_params { u32 raw_ver; u32 hw_plat; u32 fmt; + u32 nproduct_id; + u32 num_clusters; + u32 ncluster_array_offset; + u32 num_defective_parts; + u32 ndefective_parts_array_offset; + u32 nmodem_supported; }; struct smem_image_version { @@ -268,9 +285,19 @@ static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) return 0; } +static int qcom_show_chip_id(struct seq_file *seq, void *p) +{ + struct socinfo *socinfo = seq->private; + + seq_printf(seq, "%s\n", socinfo->chip_id); + + return 0; +} + QCOM_OPEN(build_id, qcom_show_build_id); QCOM_OPEN(pmic_model, qcom_show_pmic_model); QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); +QCOM_OPEN(chip_id, qcom_show_chip_id); #define DEFINE_IMAGE_OPS(type) \ static int show_image_##type(struct seq_file *seq, void *p) \ @@ -309,6 +336,34 @@ static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); switch (qcom_socinfo->info.fmt) { + case SOCINFO_VERSION(0, 15): + qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported); + + debugfs_create_u32("nmodem_supported", 0400, qcom_socinfo->dbg_root, + &qcom_socinfo->info.nmodem_supported); + /* Fall through */ + case SOCINFO_VERSION(0, 14): + qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters); + qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset); + qcom_socinfo->info.num_defective_parts = __le32_to_cpu(info->num_defective_parts); + qcom_socinfo->info.ndefective_parts_array_offset = __le32_to_cpu(info->ndefective_parts_array_offset); + + debugfs_create_u32("num_clusters", 0400, qcom_socinfo->dbg_root, + &qcom_socinfo->info.num_clusters); + debugfs_create_u32("ncluster_array_offset", 0400, qcom_socinfo->dbg_root, + &qcom_socinfo->info.ncluster_array_offset); + debugfs_create_u32("num_defective_parts", 0400, qcom_socinfo->dbg_root, + &qcom_socinfo->info.num_defective_parts); + debugfs_create_u32("ndefective_parts_array_offset", 0400, qcom_socinfo->dbg_root, + &qcom_socinfo->info.ndefective_parts_array_offset); + /* Fall through */ + case SOCINFO_VERSION(0, 13): + qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id); + + debugfs_create_u32("nproduct_id", 0400, qcom_socinfo->dbg_root, + &qcom_socinfo->info.nproduct_id); + DEBUGFS_ADD(info, chip_id); + /* Fall through */ case SOCINFO_VERSION(0, 12): qcom_socinfo->info.chip_family = __le32_to_cpu(info->chip_family);
Add support for newer Qualcomm SoC info structures (up to version 0.15). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/soc/qcom/socinfo.c | 55 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+)