| Message ID | 20200625103123.7240-1-saiprakash.ranjan@codeaurora.org (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 108447fd0d1a34b0929cd26dc637c917a734ebab |
| Headers | show |
| Series | arm64: Add KRYO{3,4}XX silver CPU cores to SSB safelist | expand |
Hi, On Thu, Jun 25, 2020 at 3:31 AM Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> wrote: > > QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on > Cortex-A55 and are SSB safe, hence add them to SSB > safelist -> arm64_ssb_cpus[]. > > Reported-by: Stephen Boyd <swboyd@chromium.org> > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- > arch/arm64/kernel/cpu_errata.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c > index ad06d6802d2e..cf50c53e9357 100644 > --- a/arch/arm64/kernel/cpu_errata.c > +++ b/arch/arm64/kernel/cpu_errata.c > @@ -460,6 +460,8 @@ static const struct midr_range arm64_ssb_cpus[] = { > MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), > MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), > MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), > + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER), > + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER), Reviewed-by: Douglas Anderson <dianders@chromium.org>
On Thu, 25 Jun 2020 16:01:23 +0530, Sai Prakash Ranjan wrote: > QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on > Cortex-A55 and are SSB safe, hence add them to SSB > safelist -> arm64_ssb_cpus[]. Applied to arm64 (for-next/fixes), thanks! [1/1] arm64: Add KRYO{3,4}XX silver CPU cores to SSB safelist https://git.kernel.org/arm64/c/108447fd0d1a Cheers,
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index ad06d6802d2e..cf50c53e9357 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -460,6 +460,8 @@ static const struct midr_range arm64_ssb_cpus[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER), + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER), {}, };
QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on Cortex-A55 and are SSB safe, hence add them to SSB safelist -> arm64_ssb_cpus[]. Reported-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- arch/arm64/kernel/cpu_errata.c | 2 ++ 1 file changed, 2 insertions(+)