| Message ID | 20200701234344.91843-2-ljp@linux.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add several Power ISA 3.1 32/64-bit vector instructions | expand |
On Wed, Jul 01, 2020 at 06:43:36PM -0500, Lijun Pan wrote: > This flag will be used for Power10 instructions. > > Signed-off-by: Lijun Pan <ljp@linux.ibm.com> Applied to ppc-for-5.2. > --- > v4: split to 01/11 and 02/11 > v2: add Power ISA 3.1 flag > > target/ppc/cpu.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > index 1988b436cb..a5e9c08dcc 100644 > --- a/target/ppc/cpu.h > +++ b/target/ppc/cpu.h > @@ -2191,6 +2191,8 @@ enum { > PPC2_PM_ISA206 = 0x0000000000040000ULL, > /* POWER ISA 3.0 */ > PPC2_ISA300 = 0x0000000000080000ULL, > + /* POWER ISA 3.1 */ > + PPC2_ISA310 = 0x0000000000100000ULL, > > #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ > PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 1988b436cb..a5e9c08dcc 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2191,6 +2191,8 @@ enum { PPC2_PM_ISA206 = 0x0000000000040000ULL, /* POWER ISA 3.0 */ PPC2_ISA300 = 0x0000000000080000ULL, + /* POWER ISA 3.1 */ + PPC2_ISA310 = 0x0000000000100000ULL, #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
This flag will be used for Power10 instructions. Signed-off-by: Lijun Pan <ljp@linux.ibm.com> --- v4: split to 01/11 and 02/11 v2: add Power ISA 3.1 flag target/ppc/cpu.h | 2 ++ 1 file changed, 2 insertions(+)