diff mbox series

arm64: Documentation: Fix broken table in generated HTML

Message ID 20200707143152.154541-1-suzuki.poulose@arm.com (mailing list archive)
State Mainlined
Commit 581fce373581772470af8fb4fe13505dc66281e6
Headers show
Series arm64: Documentation: Fix broken table in generated HTML | expand

Commit Message

Suzuki K Poulose July 7, 2020, 2:31 p.m. UTC
cpu-feature-registers.rst is missing a new line before a couple
of tables listing the visible fields, causing broken tables in
the HTML documentation generated by "make htmldocs". Fix this
by adding the missing new line.

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 Here is the broken HTML doc. Look for MIDR_EL1.

 https://www.kernel.org/doc/html/latest/arm64/cpu-feature-registers.html
---
 Documentation/arm64/cpu-feature-registers.rst | 2 ++
 1 file changed, 2 insertions(+)

Comments

Will Deacon July 8, 2020, 10:02 p.m. UTC | #1
On Tue, 7 Jul 2020 15:31:52 +0100, Suzuki K Poulose wrote:
> cpu-feature-registers.rst is missing a new line before a couple
> of tables listing the visible fields, causing broken tables in
> the HTML documentation generated by "make htmldocs". Fix this
> by adding the missing new line.

Applied to arm64 (for-next/fixes), thanks!

[1/1] arm64: Documentation: Fix broken table in generated HTML
      https://git.kernel.org/arm64/c/581fce373581

Cheers,
diff mbox series

Patch

diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
index 41937a8091aa..61034816a9c0 100644
--- a/Documentation/arm64/cpu-feature-registers.rst
+++ b/Documentation/arm64/cpu-feature-registers.rst
@@ -171,6 +171,7 @@  infrastructure:
 
 
   3) ID_AA64PFR1_EL1 - Processor Feature Register 1
+
      +------------------------------+---------+---------+
      | Name                         |  bits   | visible |
      +------------------------------+---------+---------+
@@ -179,6 +180,7 @@  infrastructure:
 
 
   4) MIDR_EL1 - Main ID Register
+
      +------------------------------+---------+---------+
      | Name                         |  bits   | visible |
      +------------------------------+---------+---------+