diff mbox series

[6/9] drm/i915: Reject DRM_MODE_FLAG_DBLCLK with DVI sinks

Message ID 20200108181242.13650-6-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers | expand

Commit Message

Ville Syrjälä Jan. 8, 2020, 6:12 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The code assumes that DRM_MODE_FLAG_DBLCLK means that we enable the
pixel repeat feature. That only works with HDMI since it requires
AVI infoframe to signal the information to the sink. Hence even if
the mode dotclock would be valid we cannot currently assume that
we can just ignore the DBLCLK flag. Reject it for DVI sinks.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Imre Deak July 9, 2020, 11:01 a.m. UTC | #1
On Wed, Jan 08, 2020 at 08:12:39PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The code assumes that DRM_MODE_FLAG_DBLCLK means that we enable the
> pixel repeat feature. That only works with HDMI since it requires
> AVI infoframe to signal the information to the sink. Hence even if
> the mode dotclock would be valid we cannot currently assume that
> we can just ignore the DBLCLK flag. Reject it for DVI sinks.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 85c5f840a0fc..a62dd3348301 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2185,8 +2185,11 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
>  	if (clock > max_dotclk)
>  		return MODE_CLOCK_HIGH;
>  
> -	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> +	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
> +		if (!has_hdmi_sink)
> +			return MODE_CLOCK_LOW;

MODE_H_ILLEGAL is used elsewhere for this case, and also an odd MODE_BAD
at one place.

>  		clock *= 2;
> +	}
>  
>  	if (drm_mode_is_420_only(&connector->display_info, mode))
>  		clock /= 2;
> -- 
> 2.24.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Ville Syrjälä July 9, 2020, 12:04 p.m. UTC | #2
On Thu, Jul 09, 2020 at 02:01:19PM +0300, Imre Deak wrote:
> On Wed, Jan 08, 2020 at 08:12:39PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > The code assumes that DRM_MODE_FLAG_DBLCLK means that we enable the
> > pixel repeat feature. That only works with HDMI since it requires
> > AVI infoframe to signal the information to the sink. Hence even if
> > the mode dotclock would be valid we cannot currently assume that
> > we can just ignore the DBLCLK flag. Reject it for DVI sinks.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Reviewed-by: Imre Deak <imre.deak@intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_hdmi.c | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > index 85c5f840a0fc..a62dd3348301 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > @@ -2185,8 +2185,11 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
> >  	if (clock > max_dotclk)
> >  		return MODE_CLOCK_HIGH;
> >  
> > -	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> > +	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
> > +		if (!has_hdmi_sink)
> > +			return MODE_CLOCK_LOW;
> 
> MODE_H_ILLEGAL is used elsewhere for this case, and also an odd MODE_BAD
> at one place.

Not seeing the MODE_BAD. The MODE_H_ILLEGAL cases are in the DP code.
I think that check is kinda wrong for DP anyway, except possinbly when
driving a HDMI sink via the protocol converter. Can't be sure since
IIRC the DP spec doesn't really say whether protocol converters are
supposed to enable pixel repeat for the HDMI part or not.

I think I migth have had a patch somewhere to ignore this for non-HDMI
sinks in the DP code. Which at least should be safe.

> 
> >  		clock *= 2;
> > +	}
> >  
> >  	if (drm_mode_is_420_only(&connector->display_info, mode))
> >  		clock /= 2;
> > -- 
> > 2.24.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 85c5f840a0fc..a62dd3348301 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2185,8 +2185,11 @@  intel_hdmi_mode_valid(struct drm_connector *connector,
 	if (clock > max_dotclk)
 		return MODE_CLOCK_HIGH;
 
-	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
+		if (!has_hdmi_sink)
+			return MODE_CLOCK_LOW;
 		clock *= 2;
+	}
 
 	if (drm_mode_is_420_only(&connector->display_info, mode))
 		clock /= 2;