| Message ID | 20200701194234.18123-1-yannick.fertre@st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/bridge/synopsys: dsi: add support for non-continuous HS clock | expand |
On 7/1/20 9:42 PM, Yannick Fertre wrote: > From: Antonio Borneo <antonio.borneo@st.com> > > Current code enables the HS clock when video mode is started or to > send out a HS command, and disables the HS clock to send out a LP > command. This is not what DSI spec specify. > > Enable HS clock either in command and in video mode. > Set automatic HS clock management for panels and devices that > support non-continuous HS clock. > > Signed-off-by: Antonio Borneo <antonio.borneo@st.com> > --- > drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > index d580b2aa4ce9..979acaa90d00 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > @@ -365,7 +365,6 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, > if (lpm) > val |= CMD_MODE_ALL_LP; > > - dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); > dsi_write(dsi, DSI_CMD_MODE_CFG, val); > } > > @@ -541,16 +540,22 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi) > static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi, > unsigned long mode_flags) > { > + u32 val; > + > dsi_write(dsi, DSI_PWR_UP, RESET); > > if (mode_flags & MIPI_DSI_MODE_VIDEO) { > dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE); > dw_mipi_dsi_video_mode_config(dsi); > - dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); > } else { > dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE); > } > > + val = PHY_TXREQUESTCLKHS; > + if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) > + val |= AUTO_CLKLANE_CTRL; > + dsi_write(dsi, DSI_LPCLK_CTRL, val); > + > dsi_write(dsi, DSI_PWR_UP, POWERUP); > } > > (+ Antonio) Hi Yannick & Antonio, Reviewed-by: Philippe Cornu <philippe.cornu@st.com> Tested-by: Philippe Cornu <philippe.cornu@st.com> (Tested with the 3 patches named drm/bridge/synopsys: dsi: allow LP commands in video mode drm/bridge/synopsys: dsi: allow sending longer LP commands drm/bridge/synopsys: dsi: add support for non-continuous HS clock on various dsi bridges + stm32mp157 disco board) Many thanks Philippe :-)
On 01/07/2020 21:42, Yannick Fertre wrote: > From: Antonio Borneo <antonio.borneo@st.com> > > Current code enables the HS clock when video mode is started or to > send out a HS command, and disables the HS clock to send out a LP > command. This is not what DSI spec specify. > > Enable HS clock either in command and in video mode. > Set automatic HS clock management for panels and devices that > support non-continuous HS clock. > > Signed-off-by: Antonio Borneo <antonio.borneo@st.com> > --- > drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > index d580b2aa4ce9..979acaa90d00 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > @@ -365,7 +365,6 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, > if (lpm) > val |= CMD_MODE_ALL_LP; > > - dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); > dsi_write(dsi, DSI_CMD_MODE_CFG, val); > } > > @@ -541,16 +540,22 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi) > static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi, > unsigned long mode_flags) > { > + u32 val; > + > dsi_write(dsi, DSI_PWR_UP, RESET); > > if (mode_flags & MIPI_DSI_MODE_VIDEO) { > dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE); > dw_mipi_dsi_video_mode_config(dsi); > - dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); > } else { > dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE); > } > > + val = PHY_TXREQUESTCLKHS; > + if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) > + val |= AUTO_CLKLANE_CTRL; > + dsi_write(dsi, DSI_LPCLK_CTRL, val); > + > dsi_write(dsi, DSI_PWR_UP, POWERUP); > } > > Tested on Amlogic AXG (v1.21a) Acked-by: Neil Armstrong <narmstrong@baylibre.com> Applying to drm-misc-next Thanks ! Neil
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index d580b2aa4ce9..979acaa90d00 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c @@ -365,7 +365,6 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, if (lpm) val |= CMD_MODE_ALL_LP; - dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); dsi_write(dsi, DSI_CMD_MODE_CFG, val); } @@ -541,16 +540,22 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi) static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi, unsigned long mode_flags) { + u32 val; + dsi_write(dsi, DSI_PWR_UP, RESET); if (mode_flags & MIPI_DSI_MODE_VIDEO) { dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE); dw_mipi_dsi_video_mode_config(dsi); - dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); } else { dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE); } + val = PHY_TXREQUESTCLKHS; + if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) + val |= AUTO_CLKLANE_CTRL; + dsi_write(dsi, DSI_LPCLK_CTRL, val); + dsi_write(dsi, DSI_PWR_UP, POWERUP); }