[v5,5/6] bus: cdmm: Add MIPS R5 arch support

Commit Message

Serge Semin July 14, 2020, 12:57 p.m. UTC

CDMM may be available not only on MIPS R2 architectures, but also on
newer MIPS R5 chips. For instance our P5600 chip has one. Let's mark
the CDMM bus being supported for that MIPS arch too.

Signed-off-by: Serge Semin <[e-mail]>
Reviewed-by: Thomas Bogendoerfer <[e-mail]>
---
 drivers/bus/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Arnd Bergmann July 14, 2020, 1:28 p.m. UTC | #1

On Tue, Jul 14, 2020 at 2:58 PM Serge Semin
<[e-mail]> wrote:
>
>  config MIPS_CDMM
>         bool "MIPS Common Device Memory Map (CDMM) Driver"
> -       depends on CPU_MIPSR2
> +       depends on CPU_MIPSR2 || CPU_MIPSR5
>         help

Wouldn't a kernel built for P5600 have CPU_MIPSR2 set already?
I thought R5 was just a backwards-compatible extension of R2.

If not, what about R3?

      Arnd

Serge Semin July 14, 2020, 2:15 p.m. UTC | #2

On Tue, Jul 14, 2020 at 03:28:30PM +0200, Arnd Bergmann wrote:
> On Tue, Jul 14, 2020 at 2:58 PM Serge Semin
> <[e-mail]> wrote:
> >
> >  config MIPS_CDMM
> >         bool "MIPS Common Device Memory Map (CDMM) Driver"
> > -       depends on CPU_MIPSR2
> > +       depends on CPU_MIPSR2 || CPU_MIPSR5
> >         help
> 

> Wouldn't a kernel built for P5600 have CPU_MIPSR2 set already?

No. P5600 core is based on MIPS32 r5, for which since 5.8 there has been a
dedicated kernel config CPU_MIPSR5 available. 

> I thought R5 was just a backwards-compatible extension of R2.

Yes, it's an extension and they are compatible in most of aspects, but
there are still differences, which when activated/used make kernel built
for R5 being incompatible with R2. For instance there is an ISA
extension in R5 which hasn't been available in R5 like "eretnc"
(return from exceptions with no atomic flag cleared), "mfhc/mthc0"
(extended C0 register move instructions), etc. There is some other
features/optimizations available since R5. Please see commit
ab7c01fdc3cf ("mips: Add MIPS Release 5 support") for details.

> 
> If not, what about R3?

Currently if some chip is equipped with R3, then the kernel must be built
for R2 with features like EVA enabled if it's required.

-Sergey

> 
>       Arnd

Patch

diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
index 6d4e4497b59b..971c07bc92d4 100644
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -58,7 +58,7 @@  config IMX_WEIM
 
 config MIPS_CDMM
 	bool "MIPS Common Device Memory Map (CDMM) Driver"
-	depends on CPU_MIPSR2
+	depends on CPU_MIPSR2 || CPU_MIPSR5
 	help
 	  Driver needed for the MIPS Common Device Memory Map bus in MIPS
 	  cores. This bus is for per-CPU tightly coupled devices such as the