Message ID | 20200703080646.23233-1-computersforpeace@gmail.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 13355ca35cd16f5024655ac06e228b3c199e52a9 |
Headers | show |
Series | [1/2] pinctrl: qcom: ipq4019: add open drain support | expand |
On Fri, Jul 3, 2020 at 10:06 AM Brian Norris <computersforpeace@gmail.com> wrote: > From: Jaiganesh Narayanan <njaigane@codeaurora.org> > > Signed-off-by: Jaiganesh Narayanan <njaigane@codeaurora.org> > [ Brian: adapted from from the Chromium OS kernel used on IPQ4019-based > WiFi APs. ] > Signed-off-by: Brian Norris <computersforpeace@gmail.com> Patch applied because this looks innocent and Rob ACKed the binding. If Bjorn opposes, I will simply pull the patch out again. Yours, Linus Walleij
+ Bjorn for real - Bjorn @mistyped-domain On Thu, Jul 16, 2020 at 1:47 AM Linus Walleij <linus.walleij@linaro.org> wrote: > On Fri, Jul 3, 2020 at 10:06 AM Brian Norris > <computersforpeace@gmail.com> wrote: > > > From: Jaiganesh Narayanan <njaigane@codeaurora.org> > > > > Signed-off-by: Jaiganesh Narayanan <njaigane@codeaurora.org> > > [ Brian: adapted from from the Chromium OS kernel used on IPQ4019-based > > WiFi APs. ] > > Signed-off-by: Brian Norris <computersforpeace@gmail.com> > > Patch applied because this looks innocent and Rob > ACKed the binding. Thanks! > If Bjorn opposes, I will simply pull the patch out again. Unfortunately, depending on his mail subscriptions and filters, Bjorn may not have had much of a chance there. I failed to notice that I deleted the "g" in ".org", so my mail didn't deliver to him. Bjorn: for reference, here are archive links to the entire patch set: https://lore.kernel.org/linux-gpio/20200703080646.23233-1-computersforpeace@gmail.com/ https://lore.kernel.org/linux-gpio/20200703080646.23233-2-computersforpeace@gmail.com/ Brian
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c index 8bdb5bd393d2..63915cb210ff 100644 --- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c +++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c @@ -254,6 +254,7 @@ DECLARE_QCA_GPIO_PINS(99); .mux_bit = 2, \ .pull_bit = 0, \ .drv_bit = 6, \ + .od_bit = 12, \ .oe_bit = 9, \ .in_bit = 0, \ .out_bit = 1, \ diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 83b7d64bc4c1..dac0404dadf4 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -233,6 +233,10 @@ static int msm_config_reg(struct msm_pinctrl *pctrl, *bit = g->pull_bit; *mask = 3; break; + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + *bit = g->od_bit; + *mask = 1; + break; case PIN_CONFIG_DRIVE_STRENGTH: *bit = g->drv_bit; *mask = 7; @@ -310,6 +314,12 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev, if (!arg) return -EINVAL; break; + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + /* Pin is not open-drain */ + if (!arg) + return -EINVAL; + arg = 1; + break; case PIN_CONFIG_DRIVE_STRENGTH: arg = msm_regval_to_drive(arg); break; @@ -382,6 +392,9 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev, else arg = MSM_PULL_UP; break; + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + arg = 1; + break; case PIN_CONFIG_DRIVE_STRENGTH: /* Check for invalid values */ if (arg > 16 || arg < 2 || (arg % 2) != 0) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h index 9452da18a78b..dc7f8c84744b 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.h +++ b/drivers/pinctrl/qcom/pinctrl-msm.h @@ -38,6 +38,7 @@ struct msm_function { * @mux_bit: Offset in @ctl_reg for the pinmux function selection. * @pull_bit: Offset in @ctl_reg for the bias configuration. * @drv_bit: Offset in @ctl_reg for the drive strength configuration. + * @od_bit: Offset in @ctl_reg for controlling open drain. * @oe_bit: Offset in @ctl_reg for controlling output enable. * @in_bit: Offset in @io_reg for the input bit value. * @out_bit: Offset in @io_reg for the output bit value. @@ -75,6 +76,7 @@ struct msm_pingroup { unsigned pull_bit:5; unsigned drv_bit:5; + unsigned od_bit:5; unsigned oe_bit:5; unsigned in_bit:5; unsigned out_bit:5;