diff mbox series

[2/2] thermal: qcom: tsens-v0_1: Add support for MSM8939

Message ID 20200629144926.665-3-shawn.guo@linaro.org (mailing list archive)
State New, archived
Delegated to: Daniel Lezcano
Headers show
Series Add msm8939 tsens support | expand

Commit Message

Shawn Guo June 29, 2020, 2:49 p.m. UTC
The TSENS integrated on MSM8939 is a v0_1 device with 10 sensors.
Different from its predecessor MSM8916, where 'calib_sel' bits sit in
separate qfprom word, MSM8939 has 'cailb' and 'calib_sel' bits mixed and
spread on discrete offsets.  That's why all qfprom bits are read as one
go and later mapped to calibration data for MSM8939.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 drivers/thermal/qcom/tsens-v0_1.c | 144 +++++++++++++++++++++++++++++-
 drivers/thermal/qcom/tsens.c      |   3 +
 drivers/thermal/qcom/tsens.h      |   2 +-
 3 files changed, 147 insertions(+), 2 deletions(-)

Comments

Amit Kucheria July 27, 2020, 6:26 a.m. UTC | #1
On Tue, Jun 30, 2020 at 1:09 AM Shawn Guo <shawn.guo@linaro.org> wrote:
>
> The TSENS integrated on MSM8939 is a v0_1 device with 10 sensors.
> Different from its predecessor MSM8916, where 'calib_sel' bits sit in
> separate qfprom word, MSM8939 has 'cailb' and 'calib_sel' bits mixed and
> spread on discrete offsets.  That's why all qfprom bits are read as one
> go and later mapped to calibration data for MSM8939.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Acked-by: Amit Kucheria <amit.kucheria@linaro.org>

> ---
>  drivers/thermal/qcom/tsens-v0_1.c | 144 +++++++++++++++++++++++++++++-
>  drivers/thermal/qcom/tsens.c      |   3 +
>  drivers/thermal/qcom/tsens.h      |   2 +-
>  3 files changed, 147 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c
> index 959a9371d205..e64db5f80d90 100644
> --- a/drivers/thermal/qcom/tsens-v0_1.c
> +++ b/drivers/thermal/qcom/tsens-v0_1.c
> @@ -48,6 +48,63 @@
>  #define MSM8916_CAL_SEL_MASK   0xe0000000
>  #define MSM8916_CAL_SEL_SHIFT  29
>
> +/* eeprom layout data for 8939 */
> +#define MSM8939_BASE0_MASK     0x000000ff
> +#define MSM8939_BASE1_MASK     0xff000000
> +#define MSM8939_BASE0_SHIFT    0
> +#define MSM8939_BASE1_SHIFT    24
> +
> +#define MSM8939_S0_P1_MASK     0x000001f8
> +#define MSM8939_S1_P1_MASK     0x001f8000
> +#define MSM8939_S2_P1_MASK_0_4 0xf8000000
> +#define MSM8939_S2_P1_MASK_5   0x00000001
> +#define MSM8939_S3_P1_MASK     0x00001f80
> +#define MSM8939_S4_P1_MASK     0x01f80000
> +#define MSM8939_S5_P1_MASK     0x00003f00
> +#define MSM8939_S6_P1_MASK     0x03f00000
> +#define MSM8939_S7_P1_MASK     0x0000003f
> +#define MSM8939_S8_P1_MASK     0x0003f000
> +#define MSM8939_S9_P1_MASK     0x07e00000
> +
> +#define MSM8939_S0_P2_MASK     0x00007e00
> +#define MSM8939_S1_P2_MASK     0x07e00000
> +#define MSM8939_S2_P2_MASK     0x0000007e
> +#define MSM8939_S3_P2_MASK     0x0007e000
> +#define MSM8939_S4_P2_MASK     0x7e000000
> +#define MSM8939_S5_P2_MASK     0x000fc000
> +#define MSM8939_S6_P2_MASK     0xfc000000
> +#define MSM8939_S7_P2_MASK     0x00000fc0
> +#define MSM8939_S8_P2_MASK     0x00fc0000
> +#define MSM8939_S9_P2_MASK_0_4 0xf8000000
> +#define MSM8939_S9_P2_MASK_5   0x00002000
> +
> +#define MSM8939_S0_P1_SHIFT    3
> +#define MSM8939_S1_P1_SHIFT    15
> +#define MSM8939_S2_P1_SHIFT_0_4        27
> +#define MSM8939_S2_P1_SHIFT_5  0
> +#define MSM8939_S3_P1_SHIFT    7
> +#define MSM8939_S4_P1_SHIFT    19
> +#define MSM8939_S5_P1_SHIFT    8
> +#define MSM8939_S6_P1_SHIFT    20
> +#define MSM8939_S7_P1_SHIFT    0
> +#define MSM8939_S8_P1_SHIFT    12
> +#define MSM8939_S9_P1_SHIFT    21
> +
> +#define MSM8939_S0_P2_SHIFT    9
> +#define MSM8939_S1_P2_SHIFT    21
> +#define MSM8939_S2_P2_SHIFT    1
> +#define MSM8939_S3_P2_SHIFT    13
> +#define MSM8939_S4_P2_SHIFT    25
> +#define MSM8939_S5_P2_SHIFT    14
> +#define MSM8939_S6_P2_SHIFT    26
> +#define MSM8939_S7_P2_SHIFT    6
> +#define MSM8939_S8_P2_SHIFT    18
> +#define MSM8939_S9_P2_SHIFT_0_4        27
> +#define MSM8939_S9_P2_SHIFT_5  13
> +
> +#define MSM8939_CAL_SEL_MASK   0x7
> +#define MSM8939_CAL_SEL_SHIFT  0
> +
>  /* eeprom layout data for 8974 */
>  #define BASE1_MASK             0xff
>  #define S0_P1_MASK             0x3f00
> @@ -189,6 +246,76 @@ static int calibrate_8916(struct tsens_priv *priv)
>         return 0;
>  }
>
> +static int calibrate_8939(struct tsens_priv *priv)
> +{
> +       int base0 = 0, base1 = 0, i;
> +       u32 p1[10], p2[10];
> +       int mode = 0;
> +       u32 *qfprom_cdata;
> +       u32 cdata[6];
> +
> +       qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
> +       if (IS_ERR(qfprom_cdata))
> +               return PTR_ERR(qfprom_cdata);
> +
> +       /* Mapping between qfprom nvmem and calibration data */
> +       cdata[0] = qfprom_cdata[12];
> +       cdata[1] = qfprom_cdata[13];
> +       cdata[2] = qfprom_cdata[0];
> +       cdata[3] = qfprom_cdata[1];
> +       cdata[4] = qfprom_cdata[22];
> +       cdata[5] = qfprom_cdata[21];
> +
> +       mode = (cdata[0] & MSM8939_CAL_SEL_MASK) >> MSM8939_CAL_SEL_SHIFT;
> +       dev_dbg(priv->dev, "calibration mode is %d\n", mode);
> +
> +       switch (mode) {
> +       case TWO_PT_CALIB:
> +               base1 = (cdata[3] & MSM8939_BASE1_MASK) >> MSM8939_BASE1_SHIFT;
> +               p2[0] = (cdata[0] & MSM8939_S0_P2_MASK) >> MSM8939_S0_P2_SHIFT;
> +               p2[1] = (cdata[0] & MSM8939_S1_P2_MASK) >> MSM8939_S1_P2_SHIFT;
> +               p2[2] = (cdata[1] & MSM8939_S2_P2_MASK) >> MSM8939_S2_P2_SHIFT;
> +               p2[3] = (cdata[1] & MSM8939_S3_P2_MASK) >> MSM8939_S3_P2_SHIFT;
> +               p2[4] = (cdata[1] & MSM8939_S4_P2_MASK) >> MSM8939_S4_P2_SHIFT;
> +               p2[5] = (cdata[2] & MSM8939_S5_P2_MASK) >> MSM8939_S5_P2_SHIFT;
> +               p2[6] = (cdata[2] & MSM8939_S6_P2_MASK) >> MSM8939_S6_P2_SHIFT;
> +               p2[7] = (cdata[3] & MSM8939_S7_P2_MASK) >> MSM8939_S7_P2_SHIFT;
> +               p2[8] = (cdata[3] & MSM8939_S8_P2_MASK) >> MSM8939_S8_P2_SHIFT;
> +               p2[9] = (cdata[4] & MSM8939_S9_P2_MASK_0_4) >> MSM8939_S9_P2_SHIFT_0_4;
> +               p2[9] |= ((cdata[5] & MSM8939_S9_P2_MASK_5) >> MSM8939_S9_P2_SHIFT_5) << 5;
> +               for (i = 0; i < priv->num_sensors; i++)
> +                       p2[i] = (base1 + p2[i]) << 2;
> +               fallthrough;
> +       case ONE_PT_CALIB2:
> +               base0 = (cdata[2] & MSM8939_BASE0_MASK) >> MSM8939_BASE0_SHIFT;
> +               p1[0] = (cdata[0] & MSM8939_S0_P1_MASK) >> MSM8939_S0_P1_SHIFT;
> +               p1[1] = (cdata[0] & MSM8939_S1_P1_MASK) >> MSM8939_S1_P1_SHIFT;
> +               p1[2] = (cdata[0] & MSM8939_S2_P1_MASK_0_4) >> MSM8939_S2_P1_SHIFT_0_4;
> +               p1[2] |= ((cdata[1] & MSM8939_S2_P1_MASK_5) >> MSM8939_S2_P1_SHIFT_5) << 5;
> +               p1[3] = (cdata[1] & MSM8939_S3_P1_MASK) >> MSM8939_S3_P1_SHIFT;
> +               p1[4] = (cdata[1] & MSM8939_S4_P1_MASK) >> MSM8939_S4_P1_SHIFT;
> +               p1[5] = (cdata[2] & MSM8939_S5_P1_MASK) >> MSM8939_S5_P1_SHIFT;
> +               p1[6] = (cdata[2] & MSM8939_S6_P1_MASK) >> MSM8939_S6_P1_SHIFT;
> +               p1[7] = (cdata[3] & MSM8939_S7_P1_MASK) >> MSM8939_S7_P1_SHIFT;
> +               p1[8] = (cdata[3] & MSM8939_S8_P1_MASK) >> MSM8939_S8_P1_SHIFT;
> +               p1[9] = (cdata[4] & MSM8939_S9_P1_MASK) >> MSM8939_S9_P1_SHIFT;
> +               for (i = 0; i < priv->num_sensors; i++)
> +                       p1[i] = ((base0) + p1[i]) << 2;
> +               break;
> +       default:
> +               for (i = 0; i < priv->num_sensors; i++) {
> +                       p1[i] = 500;
> +                       p2[i] = 780;
> +               }
> +               break;
> +       }
> +
> +       compute_intercept_slope(priv, p1, p2, mode);
> +       kfree(qfprom_cdata);
> +
> +       return 0;
> +}
> +
>  static int calibrate_8974(struct tsens_priv *priv)
>  {
>         int base1 = 0, base2 = 0, i;
> @@ -325,7 +452,7 @@ static int calibrate_8974(struct tsens_priv *priv)
>         return 0;
>  }
>
> -/* v0.1: 8916, 8974 */
> +/* v0.1: 8916, 8939, 8974 */
>
>  static struct tsens_features tsens_v0_1_feat = {
>         .ver_major      = VER_0_1,
> @@ -386,6 +513,21 @@ struct tsens_plat_data data_8916 = {
>         .fields = tsens_v0_1_regfields,
>  };
>
> +static const struct tsens_ops ops_8939 = {
> +       .init           = init_common,
> +       .calibrate      = calibrate_8939,
> +       .get_temp       = get_temp_common,
> +};
> +
> +struct tsens_plat_data data_8939 = {
> +       .num_sensors    = 10,
> +       .ops            = &ops_8939,
> +       .hw_ids         = (unsigned int []){ 0, 1, 2, 4, 5, 6, 7, 8, 9, 10 },
> +
> +       .feat           = &tsens_v0_1_feat,
> +       .fields = tsens_v0_1_regfields,
> +};
> +
>  static const struct tsens_ops ops_8974 = {
>         .init           = init_common,
>         .calibrate      = calibrate_8974,
> diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
> index 8d3e94d2a9ed..52656a24f813 100644
> --- a/drivers/thermal/qcom/tsens.c
> +++ b/drivers/thermal/qcom/tsens.c
> @@ -897,6 +897,9 @@ static const struct of_device_id tsens_table[] = {
>         {
>                 .compatible = "qcom,msm8916-tsens",
>                 .data = &data_8916,
> +       }, {
> +               .compatible = "qcom,msm8939-tsens",
> +               .data = &data_8939,
>         }, {
>                 .compatible = "qcom,msm8974-tsens",
>                 .data = &data_8974,
> diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
> index 59d01162c66a..f40b625f897e 100644
> --- a/drivers/thermal/qcom/tsens.h
> +++ b/drivers/thermal/qcom/tsens.h
> @@ -585,7 +585,7 @@ int get_temp_common(const struct tsens_sensor *s, int *temp);
>  extern struct tsens_plat_data data_8960;
>
>  /* TSENS v0.1 targets */
> -extern struct tsens_plat_data data_8916, data_8974;
> +extern struct tsens_plat_data data_8916, data_8939, data_8974;
>
>  /* TSENS v1 targets */
>  extern struct tsens_plat_data data_tsens_v1, data_8976;
> --
> 2.17.1
>
Amit Kucheria July 27, 2020, 6:36 a.m. UTC | #2
On Mon, Jul 27, 2020 at 11:56 AM Amit Kucheria <amit.kucheria@linaro.org> wrote:
>
> On Tue, Jun 30, 2020 at 1:09 AM Shawn Guo <shawn.guo@linaro.org> wrote:
> >
> > The TSENS integrated on MSM8939 is a v0_1 device with 10 sensors.
> > Different from its predecessor MSM8916, where 'calib_sel' bits sit in
> > separate qfprom word, MSM8939 has 'cailb' and 'calib_sel' bits mixed and
> > spread on discrete offsets.  That's why all qfprom bits are read as one
> > go and later mapped to calibration data for MSM8939.
> >
> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
>
> Acked-by: Amit Kucheria <amit.kucheria@linaro.org>

Shawn,

Have you not sent the change to the tsens.yaml and 8939 DT yet or did
I miss them?

Regards,
Amit
Shawn Guo July 27, 2020, 8:33 a.m. UTC | #3
Hi Amit,

On Mon, Jul 27, 2020 at 12:06:54PM +0530, Amit Kucheria wrote:
> On Mon, Jul 27, 2020 at 11:56 AM Amit Kucheria <amit.kucheria@linaro.org> wrote:
> >
> > On Tue, Jun 30, 2020 at 1:09 AM Shawn Guo <shawn.guo@linaro.org> wrote:
> > >
> > > The TSENS integrated on MSM8939 is a v0_1 device with 10 sensors.
> > > Different from its predecessor MSM8916, where 'calib_sel' bits sit in
> > > separate qfprom word, MSM8939 has 'cailb' and 'calib_sel' bits mixed and
> > > spread on discrete offsets.  That's why all qfprom bits are read as one
> > > go and later mapped to calibration data for MSM8939.
> > >
> > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> >
> > Acked-by: Amit Kucheria <amit.kucheria@linaro.org>
> 
> Shawn,
> 
> Have you not sent the change to the tsens.yaml and 8939 DT yet or did
> I miss them?

You were copied on '[PATCH 1/2] dt-bindings: tsens: qcom: Document
MSM8939 compatible'.  For DTS change, I haven't sent them out.  In case
you want to have a look, here it is.

	thermal-zones {
		cpu0-thermal {
			polling-delay-passive = <250>;
			polling-delay = <1000>;

			thermal-sensors = <&tsens 5>;

			trips {
				cpu0_alert: trip0 {
					temperature = <75000>;
					hysteresis = <2000>;
					type = "passive";
				};
				cpu0_crit: trip1 {
					temperature = <110000>;
					hysteresis = <2000>;
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu0_alert>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu1-thermal {
			polling-delay-passive = <250>;
			polling-delay = <1000>;

			thermal-sensors = <&tsens 6>;

			trips {
				cpu1_alert: trip0 {
					temperature = <75000>;
					hysteresis = <2000>;
					type = "passive";
				};
				cpu1_crit: trip1 {
					temperature = <110000>;
					hysteresis = <2000>;
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu1_alert>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu2-thermal {
			polling-delay-passive = <250>;
			polling-delay = <1000>;

			thermal-sensors = <&tsens 7>;

			trips {
				cpu2_alert: trip0 {
					temperature = <75000>;
					hysteresis = <2000>;
					type = "passive";
				};
				cpu2_crit: trip1 {
					temperature = <110000>;
					hysteresis = <2000>;
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu2_alert>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu3-thermal {
			polling-delay-passive = <250>;
			polling-delay = <1000>;

			thermal-sensors = <&tsens 8>;

			trips {
				cpu3_alert: trip0 {
					temperature = <75000>;
					hysteresis = <2000>;
					type = "passive";
				};
				cpu3_crit: trip1 {
					temperature = <110000>;
					hysteresis = <2000>;
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu3_alert>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu4567-thermal {
			polling-delay-passive = <250>;
			polling-delay = <1000>;

			thermal-sensors = <&tsens 9>;

			trips {
				cpu4567_alert: trip0 {
					temperature = <75000>;
					hysteresis = <2000>;
					type = "passive";
				};
				cpu4567_crit: trip1 {
					temperature = <110000>;
					hysteresis = <2000>;
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu4567_alert>;
					cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

	};

	qfprom: qfprom@5c000 {
		compatible = "qcom,qfprom";
		reg = <0x5c000 0x1000>;
		#address-cells = <1>;
		#size-cells = <1>;
		tsens_caldata: caldata@a0 {
			reg = <0xa0 0x5c>;
		};
	};

	tsens: thermal-sensor@4a9000 {
		compatible = "qcom,msm8939-tsens";
		reg = <0x4a9000 0x1000>, /* TM */
		      <0x4a8000 0x1000>; /* SROT */
		nvmem-cells = <&tsens_caldata>;
		nvmem-cell-names = "calib";
		#qcom,sensors = <10>;
		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "uplow";
		#thermal-sensor-cells = <1>;
	};

Shawn
Amit Kucheria July 27, 2020, 9:15 a.m. UTC | #4
On Mon, Jul 27, 2020 at 2:03 PM Shawn Guo <shawn.guo@linaro.org> wrote:
>
> Hi Amit,
>
> On Mon, Jul 27, 2020 at 12:06:54PM +0530, Amit Kucheria wrote:
> > On Mon, Jul 27, 2020 at 11:56 AM Amit Kucheria <amit.kucheria@linaro.org> wrote:
> > >
> > > On Tue, Jun 30, 2020 at 1:09 AM Shawn Guo <shawn.guo@linaro.org> wrote:
> > > >
> > > > The TSENS integrated on MSM8939 is a v0_1 device with 10 sensors.
> > > > Different from its predecessor MSM8916, where 'calib_sel' bits sit in
> > > > separate qfprom word, MSM8939 has 'cailb' and 'calib_sel' bits mixed and
> > > > spread on discrete offsets.  That's why all qfprom bits are read as one
> > > > go and later mapped to calibration data for MSM8939.
> > > >
> > > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > >
> > > Acked-by: Amit Kucheria <amit.kucheria@linaro.org>
> >
> > Shawn,
> >
> > Have you not sent the change to the tsens.yaml and 8939 DT yet or did
> > I miss them?
>
> You were copied on '[PATCH 1/2] dt-bindings: tsens: qcom: Document
> MSM8939 compatible'.

Aah ok, it was threaded weirdly but I see it now.

> For DTS change, I haven't sent them out.  In case
> you want to have a look, here it is.

This looks fine from a quick glance. Thanks.

>         thermal-zones {
>                 cpu0-thermal {
>                         polling-delay-passive = <250>;
>                         polling-delay = <1000>;
>
>                         thermal-sensors = <&tsens 5>;
>
>                         trips {
>                                 cpu0_alert: trip0 {
>                                         temperature = <75000>;
>                                         hysteresis = <2000>;
>                                         type = "passive";
>                                 };
>                                 cpu0_crit: trip1 {
>                                         temperature = <110000>;
>                                         hysteresis = <2000>;
>                                         type = "critical";
>                                 };
>                         };
>
>                         cooling-maps {
>                                 map0 {
>                                         trip = <&cpu0_alert>;
>                                         cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>                                 };
>                         };
>                 };
>
>                 cpu1-thermal {
>                         polling-delay-passive = <250>;
>                         polling-delay = <1000>;
>
>                         thermal-sensors = <&tsens 6>;
>
>                         trips {
>                                 cpu1_alert: trip0 {
>                                         temperature = <75000>;
>                                         hysteresis = <2000>;
>                                         type = "passive";
>                                 };
>                                 cpu1_crit: trip1 {
>                                         temperature = <110000>;
>                                         hysteresis = <2000>;
>                                         type = "critical";
>                                 };
>                         };
>
>                         cooling-maps {
>                                 map0 {
>                                         trip = <&cpu1_alert>;
>                                         cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>                                 };
>                         };
>                 };
>
>                 cpu2-thermal {
>                         polling-delay-passive = <250>;
>                         polling-delay = <1000>;
>
>                         thermal-sensors = <&tsens 7>;
>
>                         trips {
>                                 cpu2_alert: trip0 {
>                                         temperature = <75000>;
>                                         hysteresis = <2000>;
>                                         type = "passive";
>                                 };
>                                 cpu2_crit: trip1 {
>                                         temperature = <110000>;
>                                         hysteresis = <2000>;
>                                         type = "critical";
>                                 };
>                         };
>
>                         cooling-maps {
>                                 map0 {
>                                         trip = <&cpu2_alert>;
>                                         cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>                                 };
>                         };
>                 };
>
>                 cpu3-thermal {
>                         polling-delay-passive = <250>;
>                         polling-delay = <1000>;
>
>                         thermal-sensors = <&tsens 8>;
>
>                         trips {
>                                 cpu3_alert: trip0 {
>                                         temperature = <75000>;
>                                         hysteresis = <2000>;
>                                         type = "passive";
>                                 };
>                                 cpu3_crit: trip1 {
>                                         temperature = <110000>;
>                                         hysteresis = <2000>;
>                                         type = "critical";
>                                 };
>                         };
>
>                         cooling-maps {
>                                 map0 {
>                                         trip = <&cpu3_alert>;
>                                         cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>                                 };
>                         };
>                 };
>
>                 cpu4567-thermal {
>                         polling-delay-passive = <250>;
>                         polling-delay = <1000>;
>
>                         thermal-sensors = <&tsens 9>;
>
>                         trips {
>                                 cpu4567_alert: trip0 {
>                                         temperature = <75000>;
>                                         hysteresis = <2000>;
>                                         type = "passive";
>                                 };
>                                 cpu4567_crit: trip1 {
>                                         temperature = <110000>;
>                                         hysteresis = <2000>;
>                                         type = "critical";
>                                 };
>                         };
>
>                         cooling-maps {
>                                 map0 {
>                                         trip = <&cpu4567_alert>;
>                                         cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                          <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>                                 };
>                         };
>                 };
>
>         };
>
>         qfprom: qfprom@5c000 {
>                 compatible = "qcom,qfprom";
>                 reg = <0x5c000 0x1000>;
>                 #address-cells = <1>;
>                 #size-cells = <1>;
>                 tsens_caldata: caldata@a0 {
>                         reg = <0xa0 0x5c>;
>                 };
>         };
>
>         tsens: thermal-sensor@4a9000 {
>                 compatible = "qcom,msm8939-tsens";
>                 reg = <0x4a9000 0x1000>, /* TM */
>                       <0x4a8000 0x1000>; /* SROT */
>                 nvmem-cells = <&tsens_caldata>;
>                 nvmem-cell-names = "calib";
>                 #qcom,sensors = <10>;
>                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
>                 interrupt-names = "uplow";
>                 #thermal-sensor-cells = <1>;
>         };
>
> Shawn
diff mbox series

Patch

diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c
index 959a9371d205..e64db5f80d90 100644
--- a/drivers/thermal/qcom/tsens-v0_1.c
+++ b/drivers/thermal/qcom/tsens-v0_1.c
@@ -48,6 +48,63 @@ 
 #define MSM8916_CAL_SEL_MASK	0xe0000000
 #define MSM8916_CAL_SEL_SHIFT	29
 
+/* eeprom layout data for 8939 */
+#define MSM8939_BASE0_MASK	0x000000ff
+#define MSM8939_BASE1_MASK	0xff000000
+#define MSM8939_BASE0_SHIFT	0
+#define MSM8939_BASE1_SHIFT	24
+
+#define MSM8939_S0_P1_MASK	0x000001f8
+#define MSM8939_S1_P1_MASK	0x001f8000
+#define MSM8939_S2_P1_MASK_0_4	0xf8000000
+#define MSM8939_S2_P1_MASK_5	0x00000001
+#define MSM8939_S3_P1_MASK	0x00001f80
+#define MSM8939_S4_P1_MASK	0x01f80000
+#define MSM8939_S5_P1_MASK	0x00003f00
+#define MSM8939_S6_P1_MASK	0x03f00000
+#define MSM8939_S7_P1_MASK	0x0000003f
+#define MSM8939_S8_P1_MASK	0x0003f000
+#define MSM8939_S9_P1_MASK	0x07e00000
+
+#define MSM8939_S0_P2_MASK	0x00007e00
+#define MSM8939_S1_P2_MASK	0x07e00000
+#define MSM8939_S2_P2_MASK	0x0000007e
+#define MSM8939_S3_P2_MASK	0x0007e000
+#define MSM8939_S4_P2_MASK	0x7e000000
+#define MSM8939_S5_P2_MASK	0x000fc000
+#define MSM8939_S6_P2_MASK	0xfc000000
+#define MSM8939_S7_P2_MASK	0x00000fc0
+#define MSM8939_S8_P2_MASK	0x00fc0000
+#define MSM8939_S9_P2_MASK_0_4	0xf8000000
+#define MSM8939_S9_P2_MASK_5	0x00002000
+
+#define MSM8939_S0_P1_SHIFT	3
+#define MSM8939_S1_P1_SHIFT	15
+#define MSM8939_S2_P1_SHIFT_0_4	27
+#define MSM8939_S2_P1_SHIFT_5	0
+#define MSM8939_S3_P1_SHIFT	7
+#define MSM8939_S4_P1_SHIFT	19
+#define MSM8939_S5_P1_SHIFT	8
+#define MSM8939_S6_P1_SHIFT	20
+#define MSM8939_S7_P1_SHIFT	0
+#define MSM8939_S8_P1_SHIFT	12
+#define MSM8939_S9_P1_SHIFT	21
+
+#define MSM8939_S0_P2_SHIFT	9
+#define MSM8939_S1_P2_SHIFT	21
+#define MSM8939_S2_P2_SHIFT	1
+#define MSM8939_S3_P2_SHIFT	13
+#define MSM8939_S4_P2_SHIFT	25
+#define MSM8939_S5_P2_SHIFT	14
+#define MSM8939_S6_P2_SHIFT	26
+#define MSM8939_S7_P2_SHIFT	6
+#define MSM8939_S8_P2_SHIFT	18
+#define MSM8939_S9_P2_SHIFT_0_4	27
+#define MSM8939_S9_P2_SHIFT_5	13
+
+#define MSM8939_CAL_SEL_MASK	0x7
+#define MSM8939_CAL_SEL_SHIFT	0
+
 /* eeprom layout data for 8974 */
 #define BASE1_MASK		0xff
 #define S0_P1_MASK		0x3f00
@@ -189,6 +246,76 @@  static int calibrate_8916(struct tsens_priv *priv)
 	return 0;
 }
 
+static int calibrate_8939(struct tsens_priv *priv)
+{
+	int base0 = 0, base1 = 0, i;
+	u32 p1[10], p2[10];
+	int mode = 0;
+	u32 *qfprom_cdata;
+	u32 cdata[6];
+
+	qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
+	if (IS_ERR(qfprom_cdata))
+		return PTR_ERR(qfprom_cdata);
+
+	/* Mapping between qfprom nvmem and calibration data */
+	cdata[0] = qfprom_cdata[12];
+	cdata[1] = qfprom_cdata[13];
+	cdata[2] = qfprom_cdata[0];
+	cdata[3] = qfprom_cdata[1];
+	cdata[4] = qfprom_cdata[22];
+	cdata[5] = qfprom_cdata[21];
+
+	mode = (cdata[0] & MSM8939_CAL_SEL_MASK) >> MSM8939_CAL_SEL_SHIFT;
+	dev_dbg(priv->dev, "calibration mode is %d\n", mode);
+
+	switch (mode) {
+	case TWO_PT_CALIB:
+		base1 = (cdata[3] & MSM8939_BASE1_MASK) >> MSM8939_BASE1_SHIFT;
+		p2[0] = (cdata[0] & MSM8939_S0_P2_MASK) >> MSM8939_S0_P2_SHIFT;
+		p2[1] = (cdata[0] & MSM8939_S1_P2_MASK) >> MSM8939_S1_P2_SHIFT;
+		p2[2] = (cdata[1] & MSM8939_S2_P2_MASK) >> MSM8939_S2_P2_SHIFT;
+		p2[3] = (cdata[1] & MSM8939_S3_P2_MASK) >> MSM8939_S3_P2_SHIFT;
+		p2[4] = (cdata[1] & MSM8939_S4_P2_MASK) >> MSM8939_S4_P2_SHIFT;
+		p2[5] = (cdata[2] & MSM8939_S5_P2_MASK) >> MSM8939_S5_P2_SHIFT;
+		p2[6] = (cdata[2] & MSM8939_S6_P2_MASK) >> MSM8939_S6_P2_SHIFT;
+		p2[7] = (cdata[3] & MSM8939_S7_P2_MASK) >> MSM8939_S7_P2_SHIFT;
+		p2[8] = (cdata[3] & MSM8939_S8_P2_MASK) >> MSM8939_S8_P2_SHIFT;
+		p2[9] = (cdata[4] & MSM8939_S9_P2_MASK_0_4) >> MSM8939_S9_P2_SHIFT_0_4;
+		p2[9] |= ((cdata[5] & MSM8939_S9_P2_MASK_5) >> MSM8939_S9_P2_SHIFT_5) << 5;
+		for (i = 0; i < priv->num_sensors; i++)
+			p2[i] = (base1 + p2[i]) << 2;
+		fallthrough;
+	case ONE_PT_CALIB2:
+		base0 = (cdata[2] & MSM8939_BASE0_MASK) >> MSM8939_BASE0_SHIFT;
+		p1[0] = (cdata[0] & MSM8939_S0_P1_MASK) >> MSM8939_S0_P1_SHIFT;
+		p1[1] = (cdata[0] & MSM8939_S1_P1_MASK) >> MSM8939_S1_P1_SHIFT;
+		p1[2] = (cdata[0] & MSM8939_S2_P1_MASK_0_4) >> MSM8939_S2_P1_SHIFT_0_4;
+		p1[2] |= ((cdata[1] & MSM8939_S2_P1_MASK_5) >> MSM8939_S2_P1_SHIFT_5) << 5;
+		p1[3] = (cdata[1] & MSM8939_S3_P1_MASK) >> MSM8939_S3_P1_SHIFT;
+		p1[4] = (cdata[1] & MSM8939_S4_P1_MASK) >> MSM8939_S4_P1_SHIFT;
+		p1[5] = (cdata[2] & MSM8939_S5_P1_MASK) >> MSM8939_S5_P1_SHIFT;
+		p1[6] = (cdata[2] & MSM8939_S6_P1_MASK) >> MSM8939_S6_P1_SHIFT;
+		p1[7] = (cdata[3] & MSM8939_S7_P1_MASK) >> MSM8939_S7_P1_SHIFT;
+		p1[8] = (cdata[3] & MSM8939_S8_P1_MASK) >> MSM8939_S8_P1_SHIFT;
+		p1[9] = (cdata[4] & MSM8939_S9_P1_MASK) >> MSM8939_S9_P1_SHIFT;
+		for (i = 0; i < priv->num_sensors; i++)
+			p1[i] = ((base0) + p1[i]) << 2;
+		break;
+	default:
+		for (i = 0; i < priv->num_sensors; i++) {
+			p1[i] = 500;
+			p2[i] = 780;
+		}
+		break;
+	}
+
+	compute_intercept_slope(priv, p1, p2, mode);
+	kfree(qfprom_cdata);
+
+	return 0;
+}
+
 static int calibrate_8974(struct tsens_priv *priv)
 {
 	int base1 = 0, base2 = 0, i;
@@ -325,7 +452,7 @@  static int calibrate_8974(struct tsens_priv *priv)
 	return 0;
 }
 
-/* v0.1: 8916, 8974 */
+/* v0.1: 8916, 8939, 8974 */
 
 static struct tsens_features tsens_v0_1_feat = {
 	.ver_major	= VER_0_1,
@@ -386,6 +513,21 @@  struct tsens_plat_data data_8916 = {
 	.fields	= tsens_v0_1_regfields,
 };
 
+static const struct tsens_ops ops_8939 = {
+	.init		= init_common,
+	.calibrate	= calibrate_8939,
+	.get_temp	= get_temp_common,
+};
+
+struct tsens_plat_data data_8939 = {
+	.num_sensors	= 10,
+	.ops		= &ops_8939,
+	.hw_ids		= (unsigned int []){ 0, 1, 2, 4, 5, 6, 7, 8, 9, 10 },
+
+	.feat		= &tsens_v0_1_feat,
+	.fields	= tsens_v0_1_regfields,
+};
+
 static const struct tsens_ops ops_8974 = {
 	.init		= init_common,
 	.calibrate	= calibrate_8974,
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index 8d3e94d2a9ed..52656a24f813 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -897,6 +897,9 @@  static const struct of_device_id tsens_table[] = {
 	{
 		.compatible = "qcom,msm8916-tsens",
 		.data = &data_8916,
+	}, {
+		.compatible = "qcom,msm8939-tsens",
+		.data = &data_8939,
 	}, {
 		.compatible = "qcom,msm8974-tsens",
 		.data = &data_8974,
diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
index 59d01162c66a..f40b625f897e 100644
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
@@ -585,7 +585,7 @@  int get_temp_common(const struct tsens_sensor *s, int *temp);
 extern struct tsens_plat_data data_8960;
 
 /* TSENS v0.1 targets */
-extern struct tsens_plat_data data_8916, data_8974;
+extern struct tsens_plat_data data_8916, data_8939, data_8974;
 
 /* TSENS v1 targets */
 extern struct tsens_plat_data data_tsens_v1, data_8976;