diff mbox series

[v4,78/78] ARM: dts: bcm2711: Enable the display pipeline

Message ID 768aa056fded89f2ee59b4bdc32223955bb8ffe2.1594230107.git-series.maxime@cerno.tech (mailing list archive)
State New, archived
Headers show
Series drm/vc4: Support BCM2711 Display Pipeline | expand

Commit Message

Maxime Ripard July 8, 2020, 5:42 p.m. UTC 
Now that all the drivers have been adjusted for it, let's bring in the
necessary device tree changes.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 arch/arm/boot/dts/bcm2711-rpi-4-b.dts |  46 +++++++++++-
 arch/arm/boot/dts/bcm2711.dtsi        | 115 ++++++++++++++++++++++++++-
 2 files changed, 160 insertions(+), 1 deletion(-)

Comments

Dave Stevenson July 28, 2020, 3:35 p.m. UTC | #1 
Hi Maxime

On Wed, 8 Jul 2020 at 18:44, Maxime Ripard <maxime@cerno.tech> wrote:
>
> Now that all the drivers have been adjusted for it, let's bring in the
> necessary device tree changes.

Possibly a comment to say that the VEC and PV3 are deliberately NOT
enabled as the VEC requires further very specific clock setup changes?

> Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Otherwise
Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

> ---
>  arch/arm/boot/dts/bcm2711-rpi-4-b.dts |  46 +++++++++++-
>  arch/arm/boot/dts/bcm2711.dtsi        | 115 ++++++++++++++++++++++++++-
>  2 files changed, 160 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
> index 222d7825e1ab..b93eb30e1ddb 100644
> --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
> +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
> @@ -68,6 +68,14 @@
>         };
>  };
>
> +&ddc0 {
> +       status = "okay";
> +};
> +
> +&ddc1 {
> +       status = "okay";
> +};
> +
>  &firmware {
>         firmware_clocks: clocks {
>                 compatible = "raspberrypi,firmware-clocks";
> @@ -163,6 +171,36 @@
>                           "RGMII_TXD3";
>  };
>
> +&hdmi0 {
> +       clocks = <&firmware_clocks 13>, <&dvp 0>;
> +       status = "okay";
> +};
> +
> +&hdmi1 {
> +       clocks = <&firmware_clocks 13>, <&dvp 1>;
> +       status = "okay";
> +};
> +
> +&hvs {
> +       clocks = <&firmware_clocks 4>;
> +};
> +
> +&pixelvalve0 {
> +       status = "okay";
> +};
> +
> +&pixelvalve1 {
> +       status = "okay";
> +};
> +
> +&pixelvalve2 {
> +       status = "okay";
> +};
> +
> +&pixelvalve4 {
> +       status = "okay";
> +};
> +
>  &pwm1 {
>         pinctrl-names = "default";
>         pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
> @@ -231,3 +269,11 @@
>  &vchiq {
>         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
>  };
> +
> +&vc4 {
> +       status = "okay";
> +};
> +
> +&vec {
> +       status = "disabled";
> +};
> diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
> index 00bcaed1be32..e637378650f6 100644
> --- a/arch/arm/boot/dts/bcm2711.dtsi
> +++ b/arch/arm/boot/dts/bcm2711.dtsi
> @@ -12,6 +12,11 @@
>
>         interrupt-parent = <&gicv2>;
>
> +       vc4: gpu {
> +               compatible = "brcm,bcm2711-vc5";
> +               status = "disabled";
> +       };
> +
>         clk_108MHz: clk-108M {
>                 #clock-cells = <0>;
>                 compatible = "fixed-clock";
> @@ -238,6 +243,27 @@
>                         status = "disabled";
>                 };
>
> +               pixelvalve0: pixelvalve@7e206000 {
> +                       compatible = "brcm,bcm2711-pixelvalve0";
> +                       reg = <0x7e206000 0x100>;
> +                       interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> +                       status = "disabled";
> +               };
> +
> +               pixelvalve1: pixelvalve@7e207000 {
> +                       compatible = "brcm,bcm2711-pixelvalve1";
> +                       reg = <0x7e207000 0x100>;
> +                       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> +                       status = "disabled";
> +               };
> +
> +               pixelvalve2: pixelvalve@7e20a000 {
> +                       compatible = "brcm,bcm2711-pixelvalve2";
> +                       reg = <0x7e20a000 0x100>;
> +                       interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +                       status = "disabled";
> +               };
> +
>                 pwm1: pwm@7e20c800 {
>                         compatible = "brcm,bcm2835-pwm";
>                         reg = <0x7e20c800 0x28>;
> @@ -248,10 +274,25 @@
>                         status = "disabled";
>                 };
>
> -               hvs@7e400000 {
> +               pixelvalve4: pixelvalve@7e216000 {
> +                       compatible = "brcm,bcm2711-pixelvalve4";
> +                       reg = <0x7e216000 0x100>;
> +                       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> +                       status = "disabled";
> +               };
> +
> +               hvs: hvs@7e400000 {
> +                       compatible = "brcm,bcm2711-hvs";
>                         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
>                 };
>
> +               pixelvalve3: pixelvalve@7ec12000 {
> +                       compatible = "brcm,bcm2711-pixelvalve3";
> +                       reg = <0x7ec12000 0x100>;
> +                       interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> +                       status = "disabled";
> +               };
> +
>                 dvp: clock@7ef00000 {
>                         compatible = "brcm,brcm2711-dvp";
>                         reg = <0x7ef00000 0x10>;
> @@ -259,6 +300,78 @@
>                         #clock-cells = <1>;
>                         #reset-cells = <1>;
>                 };
> +
> +               hdmi0: hdmi@7ef00700 {
> +                       compatible = "brcm,bcm2711-hdmi0";
> +                       reg = <0x7ef00700 0x300>,
> +                             <0x7ef00300 0x200>,
> +                             <0x7ef00f00 0x80>,
> +                             <0x7ef00f80 0x80>,
> +                             <0x7ef01b00 0x200>,
> +                             <0x7ef01f00 0x400>,
> +                             <0x7ef00200 0x80>,
> +                             <0x7ef04300 0x100>,
> +                             <0x7ef20000 0x100>;
> +                       reg-names = "hdmi",
> +                                   "dvp",
> +                                   "phy",
> +                                   "rm",
> +                                   "packet",
> +                                   "metadata",
> +                                   "csc",
> +                                   "cec",
> +                                   "hd";
> +                       clock-names = "hdmi", "clk-108M";
> +                       resets = <&dvp 0>;
> +                       ddc = <&ddc0>;
> +                       dmas = <&dma 10>;
> +                       dma-names = "audio-rx";
> +                       status = "disabled";
> +               };
> +
> +               ddc0: i2c@7ef04500 {
> +                       compatible = "brcm,bcm2711-hdmi-i2c";
> +                       reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
> +                       reg-names = "bsc", "auto-i2c";
> +                       clock-frequency = <97500>;
> +                       status = "disabled";
> +               };
> +
> +               hdmi1: hdmi@7ef05700 {
> +                       compatible = "brcm,bcm2711-hdmi1";
> +                       reg = <0x7ef05700 0x300>,
> +                             <0x7ef05300 0x200>,
> +                             <0x7ef05f00 0x80>,
> +                             <0x7ef05f80 0x80>,
> +                             <0x7ef06b00 0x200>,
> +                             <0x7ef06f00 0x400>,
> +                             <0x7ef00280 0x80>,
> +                             <0x7ef09300 0x100>,
> +                             <0x7ef20000 0x100>;
> +                       reg-names = "hdmi",
> +                                   "dvp",
> +                                   "phy",
> +                                   "rm",
> +                                   "packet",
> +                                   "metadata",
> +                                   "csc",
> +                                   "cec",
> +                                   "hd";
> +                       ddc = <&ddc1>;
> +                       clock-names = "hdmi", "clk-108M";
> +                       resets = <&dvp 1>;
> +                       dmas = <&dma 17>;
> +                       dma-names = "audio-rx";
> +                       status = "disabled";
> +               };
> +
> +               ddc1: i2c@7ef09500 {
> +                       compatible = "brcm,bcm2711-hdmi-i2c";
> +                       reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
> +                       reg-names = "bsc", "auto-i2c";
> +                       clock-frequency = <97500>;
> +                       status = "disabled";
> +               };
>         };
>
>         /*
> --
> git-series 0.9.1
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
index 222d7825e1ab..b93eb30e1ddb 100644
--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
@@ -68,6 +68,14 @@ 
 	};
 };
 
+&ddc0 {
+	status = "okay";
+};
+
+&ddc1 {
+	status = "okay";
+};
+
 &firmware {
 	firmware_clocks: clocks {
 		compatible = "raspberrypi,firmware-clocks";
@@ -163,6 +171,36 @@ 
 			  "RGMII_TXD3";
 };
 
+&hdmi0 {
+	clocks = <&firmware_clocks 13>, <&dvp 0>;
+	status = "okay";
+};
+
+&hdmi1 {
+	clocks = <&firmware_clocks 13>, <&dvp 1>;
+	status = "okay";
+};
+
+&hvs {
+	clocks = <&firmware_clocks 4>;
+};
+
+&pixelvalve0 {
+	status = "okay";
+};
+
+&pixelvalve1 {
+	status = "okay";
+};
+
+&pixelvalve2 {
+	status = "okay";
+};
+
+&pixelvalve4 {
+	status = "okay";
+};
+
 &pwm1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
@@ -231,3 +269,11 @@ 
 &vchiq {
 	interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 };
+
+&vc4 {
+	status = "okay";
+};
+
+&vec {
+	status = "disabled";
+};
diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
index 00bcaed1be32..e637378650f6 100644
--- a/arch/arm/boot/dts/bcm2711.dtsi
+++ b/arch/arm/boot/dts/bcm2711.dtsi
@@ -12,6 +12,11 @@ 
 
 	interrupt-parent = <&gicv2>;
 
+	vc4: gpu {
+		compatible = "brcm,bcm2711-vc5";
+		status = "disabled";
+	};
+
 	clk_108MHz: clk-108M {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
@@ -238,6 +243,27 @@ 
 			status = "disabled";
 		};
 
+		pixelvalve0: pixelvalve@7e206000 {
+			compatible = "brcm,bcm2711-pixelvalve0";
+			reg = <0x7e206000 0x100>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		pixelvalve1: pixelvalve@7e207000 {
+			compatible = "brcm,bcm2711-pixelvalve1";
+			reg = <0x7e207000 0x100>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		pixelvalve2: pixelvalve@7e20a000 {
+			compatible = "brcm,bcm2711-pixelvalve2";
+			reg = <0x7e20a000 0x100>;
+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
 		pwm1: pwm@7e20c800 {
 			compatible = "brcm,bcm2835-pwm";
 			reg = <0x7e20c800 0x28>;
@@ -248,10 +274,25 @@ 
 			status = "disabled";
 		};
 
-		hvs@7e400000 {
+		pixelvalve4: pixelvalve@7e216000 {
+			compatible = "brcm,bcm2711-pixelvalve4";
+			reg = <0x7e216000 0x100>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		hvs: hvs@7e400000 {
+			compatible = "brcm,bcm2711-hvs";
 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		pixelvalve3: pixelvalve@7ec12000 {
+			compatible = "brcm,bcm2711-pixelvalve3";
+			reg = <0x7ec12000 0x100>;
+			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
 		dvp: clock@7ef00000 {
 			compatible = "brcm,brcm2711-dvp";
 			reg = <0x7ef00000 0x10>;
@@ -259,6 +300,78 @@ 
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
+
+		hdmi0: hdmi@7ef00700 {
+			compatible = "brcm,bcm2711-hdmi0";
+			reg = <0x7ef00700 0x300>,
+			      <0x7ef00300 0x200>,
+			      <0x7ef00f00 0x80>,
+			      <0x7ef00f80 0x80>,
+			      <0x7ef01b00 0x200>,
+			      <0x7ef01f00 0x400>,
+			      <0x7ef00200 0x80>,
+			      <0x7ef04300 0x100>,
+			      <0x7ef20000 0x100>;
+			reg-names = "hdmi",
+				    "dvp",
+				    "phy",
+				    "rm",
+				    "packet",
+				    "metadata",
+				    "csc",
+				    "cec",
+				    "hd";
+			clock-names = "hdmi", "clk-108M";
+			resets = <&dvp 0>;
+			ddc = <&ddc0>;
+			dmas = <&dma 10>;
+			dma-names = "audio-rx";
+			status = "disabled";
+		};
+
+		ddc0: i2c@7ef04500 {
+			compatible = "brcm,bcm2711-hdmi-i2c";
+			reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
+			reg-names = "bsc", "auto-i2c";
+			clock-frequency = <97500>;
+			status = "disabled";
+		};
+
+		hdmi1: hdmi@7ef05700 {
+			compatible = "brcm,bcm2711-hdmi1";
+			reg = <0x7ef05700 0x300>,
+			      <0x7ef05300 0x200>,
+			      <0x7ef05f00 0x80>,
+			      <0x7ef05f80 0x80>,
+			      <0x7ef06b00 0x200>,
+			      <0x7ef06f00 0x400>,
+			      <0x7ef00280 0x80>,
+			      <0x7ef09300 0x100>,
+			      <0x7ef20000 0x100>;
+			reg-names = "hdmi",
+				    "dvp",
+				    "phy",
+				    "rm",
+				    "packet",
+				    "metadata",
+				    "csc",
+				    "cec",
+				    "hd";
+			ddc = <&ddc1>;
+			clock-names = "hdmi", "clk-108M";
+			resets = <&dvp 1>;
+			dmas = <&dma 17>;
+			dma-names = "audio-rx";
+			status = "disabled";
+		};
+
+		ddc1: i2c@7ef09500 {
+			compatible = "brcm,bcm2711-hdmi-i2c";
+			reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
+			reg-names = "bsc", "auto-i2c";
+			clock-frequency = <97500>;
+			status = "disabled";
+		};
 	};
 
 	/*