diff mbox series

[v4,3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts

Message ID 1595927918-19845-4-git-send-email-grzegorz.jaszczyk@linaro.org (mailing list archive)
State New, archived
Headers show
Series Add TI PRUSS Local Interrupt Controller IRQChip driver | expand

Commit Message

Grzegorz Jaszczyk July 28, 2020, 9:18 a.m. UTC
From: Suman Anna <s-anna@ti.com>

The PRUSS INTC has a fixed number of output interrupt lines that are
connected to a number of processors or other PRUSS instances or other
devices (like DMA) on the SoC. The output interrupt lines 2 through 9
are usually connected to the main Arm host processor and are referred
to as host interrupts 0 through 7 from ARM/MPU perspective.

All of these 8 host interrupts are not always exclusively connected
to the Arm interrupt controller. Some SoCs have some interrupt lines
not connected to the Arm interrupt controller at all, while a few others
have the interrupt lines connected to multiple processors in which they
need to be partitioned as per SoC integration needs. For example, AM437x
and 66AK2G SoCs have 2 PRUSS instances each and have the host interrupt 5
connected to the other PRUSS, while AM335x has host interrupt 0 shared
between MPU and TSC_ADC and host interrupts 6 & 7 shared between MPU and
a DMA controller.

Add logic to the PRUSS INTC driver to ignore both these shared and
invalid interrupts.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
---
v3->v4:
- Due to changes in DT bindings which converts irqs-reserved
  property from uint8-array to bitmask requested by Rob introduce
  relevant changes in the driver.
- Merge the irqs-reserved and irqs-shared to one property since they
  can be handled by one logic (relevant change was introduced to DT
  binding).
- Update commit message.
v2->v3:
- Extra checks for (intc->irqs[i]) in error/remove path was moved from
  "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS
  interrupts" to this patch
v1->v2:
- https://patchwork.kernel.org/patch/11069757/
---
 drivers/irqchip/irq-pruss-intc.c | 29 ++++++++++++++++++++++++-----
 1 file changed, 24 insertions(+), 5 deletions(-)

Comments

Marc Zyngier July 28, 2020, 4:37 p.m. UTC | #1
On 2020-07-28 10:18, Grzegorz Jaszczyk wrote:
> From: Suman Anna <s-anna@ti.com>
> 
> The PRUSS INTC has a fixed number of output interrupt lines that are
> connected to a number of processors or other PRUSS instances or other
> devices (like DMA) on the SoC. The output interrupt lines 2 through 9
> are usually connected to the main Arm host processor and are referred
> to as host interrupts 0 through 7 from ARM/MPU perspective.
> 
> All of these 8 host interrupts are not always exclusively connected
> to the Arm interrupt controller. Some SoCs have some interrupt lines
> not connected to the Arm interrupt controller at all, while a few 
> others
> have the interrupt lines connected to multiple processors in which they
> need to be partitioned as per SoC integration needs. For example, 
> AM437x
> and 66AK2G SoCs have 2 PRUSS instances each and have the host interrupt 
> 5
> connected to the other PRUSS, while AM335x has host interrupt 0 shared
> between MPU and TSC_ADC and host interrupts 6 & 7 shared between MPU 
> and
> a DMA controller.
> 
> Add logic to the PRUSS INTC driver to ignore both these shared and
> invalid interrupts.
> 
> Signed-off-by: Suman Anna <s-anna@ti.com>
> Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
> ---
> v3->v4:
> - Due to changes in DT bindings which converts irqs-reserved
>   property from uint8-array to bitmask requested by Rob introduce
>   relevant changes in the driver.
> - Merge the irqs-reserved and irqs-shared to one property since they
>   can be handled by one logic (relevant change was introduced to DT
>   binding).

This isn't what I asked for in my initial review.

I repeatedly asked for the *handling* to be common, not for the
properties to be merged. I don't mind either way, but I understood
there were two properties for a good reason. Has this reason gone?

Anyway, I'll come back to it once I start reviewing the series
again.

          M.
Grzegorz Jaszczyk July 28, 2020, 10:23 p.m. UTC | #2
Hi Marc

On Tue, 28 Jul 2020 at 18:37, Marc Zyngier <maz@kernel.org> wrote:
>
> On 2020-07-28 10:18, Grzegorz Jaszczyk wrote:
> > From: Suman Anna <s-anna@ti.com>
> >
> > The PRUSS INTC has a fixed number of output interrupt lines that are
> > connected to a number of processors or other PRUSS instances or other
> > devices (like DMA) on the SoC. The output interrupt lines 2 through 9
> > are usually connected to the main Arm host processor and are referred
> > to as host interrupts 0 through 7 from ARM/MPU perspective.
> >
> > All of these 8 host interrupts are not always exclusively connected
> > to the Arm interrupt controller. Some SoCs have some interrupt lines
> > not connected to the Arm interrupt controller at all, while a few
> > others
> > have the interrupt lines connected to multiple processors in which they
> > need to be partitioned as per SoC integration needs. For example,
> > AM437x
> > and 66AK2G SoCs have 2 PRUSS instances each and have the host interrupt
> > 5
> > connected to the other PRUSS, while AM335x has host interrupt 0 shared
> > between MPU and TSC_ADC and host interrupts 6 & 7 shared between MPU
> > and
> > a DMA controller.
> >
> > Add logic to the PRUSS INTC driver to ignore both these shared and
> > invalid interrupts.
> >
> > Signed-off-by: Suman Anna <s-anna@ti.com>
> > Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
> > ---
> > v3->v4:
> > - Due to changes in DT bindings which converts irqs-reserved
> >   property from uint8-array to bitmask requested by Rob introduce
> >   relevant changes in the driver.
> > - Merge the irqs-reserved and irqs-shared to one property since they
> >   can be handled by one logic (relevant change was introduced to DT
> >   binding).
>
> This isn't what I asked for in my initial review.
>
> I repeatedly asked for the *handling* to be common, not for the
> properties to be merged. I don't mind either way, but I understood
> there were two properties for a good reason. Has this reason gone?

Yes, I am aware that you've asked for common handling. Nevertheless
due to this change the usage of irqs-shared had to change. Previously
Suman's intention was to always skip the irqs-reserved, while allowing
to try getting interrupts even from irqs-shared list but in case of
failure (during platform_get_irq_byname) it wasn't treated as an
error.
In other words: in the previous approach if the interrupt from
irqs-shared was present in DT interrupts property it was treated as a
valid resource. If the irqs-shared interrupt wasn't present in DT
interrupts property it was skipped (similar to the irqs-reserved
case).

Now after your request for handling both in a common way the
interpretation of irqs-shared had to change. Therefore there's no need
to have seperate property for them. Now it is simpler: if some
interrupt is present in irqs-reserved it will be skipped.

>
> Anyway, I'll come back to it once I start reviewing the series
> again.
>

Ok, thank you,
Grzegorz
David Lechner July 29, 2020, 6:48 p.m. UTC | #3
On 7/28/20 4:18 AM, Grzegorz Jaszczyk wrote:
> From: Suman Anna <s-anna@ti.com>
> 
> The PRUSS INTC has a fixed number of output interrupt lines that are
> connected to a number of processors or other PRUSS instances or other
> devices (like DMA) on the SoC. The output interrupt lines 2 through 9
> are usually connected to the main Arm host processor and are referred
> to as host interrupts 0 through 7 from ARM/MPU perspective.
> 
> All of these 8 host interrupts are not always exclusively connected
> to the Arm interrupt controller. Some SoCs have some interrupt lines
> not connected to the Arm interrupt controller at all, while a few others
> have the interrupt lines connected to multiple processors in which they
> need to be partitioned as per SoC integration needs. For example, AM437x
> and 66AK2G SoCs have 2 PRUSS instances each and have the host interrupt 5
> connected to the other PRUSS, while AM335x has host interrupt 0 shared
> between MPU and TSC_ADC and host interrupts 6 & 7 shared between MPU and
> a DMA controller.
> 
> Add logic to the PRUSS INTC driver to ignore both these shared and
> invalid interrupts.

If a person wanted to use DMA with a PRU what will handle the mapping
of a PRU event to host interrupt 6 or 7 if they are being ignored here?

> 
> Signed-off-by: Suman Anna <s-anna@ti.com>
> Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
> ---
> v3->v4:
> - Due to changes in DT bindings which converts irqs-reserved
>    property from uint8-array to bitmask requested by Rob introduce
>    relevant changes in the driver.
> - Merge the irqs-reserved and irqs-shared to one property since they
>    can be handled by one logic (relevant change was introduced to DT
>    binding).
> - Update commit message.
> v2->v3:
> - Extra checks for (intc->irqs[i]) in error/remove path was moved from
>    "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS
>    interrupts" to this patch
> v1->v2:
> - https://patchwork.kernel.org/patch/11069757/
> ---
>   drivers/irqchip/irq-pruss-intc.c | 29 ++++++++++++++++++++++++-----
>   1 file changed, 24 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c
> index 45b966a..cf9a59b 100644
> --- a/drivers/irqchip/irq-pruss-intc.c
> +++ b/drivers/irqchip/irq-pruss-intc.c
> @@ -474,7 +474,7 @@ static int pruss_intc_probe(struct platform_device *pdev)
>   	struct pruss_intc *intc;
>   	struct pruss_host_irq_data *host_data[MAX_NUM_HOST_IRQS] = { NULL };
>   	int i, irq, ret;
> -	u8 max_system_events;
> +	u8 max_system_events, invalid_intr = 0;
>   
>   	data = of_device_get_match_data(dev);
>   	if (!data)
> @@ -496,6 +496,16 @@ static int pruss_intc_probe(struct platform_device *pdev)
>   		return PTR_ERR(intc->base);
>   	}
>   
> +	ret = of_property_read_u8(dev->of_node, "ti,irqs-reserved",
> +				  &invalid_intr);

Why not make the variable name match the property name?

> +
> +	/*
> +	 * The irqs-reserved is used only for some SoC's therefore not having
> +	 * this property is still valid
> +	 */
> +	if (ret < 0 && ret != -EINVAL)
> +		return ret;
> +
>   	pruss_intc_init(intc);
>   
>   	mutex_init(&intc->lock);
> @@ -506,6 +516,9 @@ static int pruss_intc_probe(struct platform_device *pdev)
>   		return -ENOMEM;
>   
>   	for (i = 0; i < MAX_NUM_HOST_IRQS; i++) {
> +		if (invalid_intr & BIT(i))
> +			continue;
> +
>   		irq = platform_get_irq_byname(pdev, irq_names[i]);
>   		if (irq <= 0) {
>   			dev_err(dev, "platform_get_irq_byname failed for %s : %d\n",
> @@ -533,8 +546,11 @@ static int pruss_intc_probe(struct platform_device *pdev)
>   	return 0;
>   
>   fail_irq:
> -	while (--i >= 0)
> -		irq_set_chained_handler_and_data(intc->irqs[i], NULL, NULL);
> +	while (--i >= 0) {
> +		if (intc->irqs[i])
> +			irq_set_chained_handler_and_data(intc->irqs[i], NULL,
> +							 NULL);
> +	}
>   
>   	irq_domain_remove(intc->domain);
>   
> @@ -548,8 +564,11 @@ static int pruss_intc_remove(struct platform_device *pdev)
>   	unsigned int hwirq;
>   	int i;
>   
> -	for (i = 0; i < MAX_NUM_HOST_IRQS; i++)
> -		irq_set_chained_handler_and_data(intc->irqs[i], NULL, NULL);
> +	for (i = 0; i < MAX_NUM_HOST_IRQS; i++) {
> +		if (intc->irqs[i])
> +			irq_set_chained_handler_and_data(intc->irqs[i], NULL,
> +							 NULL);
> +	}
>   
>   	for (hwirq = 0; hwirq < max_system_events; hwirq++)
>   		irq_dispose_mapping(irq_find_mapping(intc->domain, hwirq));
>
Grzegorz Jaszczyk July 31, 2020, 2:11 p.m. UTC | #4
On Wed, 29 Jul 2020 at 20:48, David Lechner <david@lechnology.com> wrote:
>
> On 7/28/20 4:18 AM, Grzegorz Jaszczyk wrote:
> > From: Suman Anna <s-anna@ti.com>
> >
> > The PRUSS INTC has a fixed number of output interrupt lines that are
> > connected to a number of processors or other PRUSS instances or other
> > devices (like DMA) on the SoC. The output interrupt lines 2 through 9
> > are usually connected to the main Arm host processor and are referred
> > to as host interrupts 0 through 7 from ARM/MPU perspective.
> >
> > All of these 8 host interrupts are not always exclusively connected
> > to the Arm interrupt controller. Some SoCs have some interrupt lines
> > not connected to the Arm interrupt controller at all, while a few others
> > have the interrupt lines connected to multiple processors in which they
> > need to be partitioned as per SoC integration needs. For example, AM437x
> > and 66AK2G SoCs have 2 PRUSS instances each and have the host interrupt 5
> > connected to the other PRUSS, while AM335x has host interrupt 0 shared
> > between MPU and TSC_ADC and host interrupts 6 & 7 shared between MPU and
> > a DMA controller.
> >
> > Add logic to the PRUSS INTC driver to ignore both these shared and
> > invalid interrupts.
>
> If a person wanted to use DMA with a PRU what will handle the mapping
> of a PRU event to host interrupt 6 or 7 if they are being ignored here?

Mapping can be handled independently: even if a given host interrupt
is on irqs-reserved list, the mapping description for it can be
provided (e.g. similar to the resource table case passed through rproc
subsystem) and nothing prevents this driver from actually routing it.

>
> >
> > Signed-off-by: Suman Anna <s-anna@ti.com>
> > Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
> > ---
> > v3->v4:
> > - Due to changes in DT bindings which converts irqs-reserved
> >    property from uint8-array to bitmask requested by Rob introduce
> >    relevant changes in the driver.
> > - Merge the irqs-reserved and irqs-shared to one property since they
> >    can be handled by one logic (relevant change was introduced to DT
> >    binding).
> > - Update commit message.
> > v2->v3:
> > - Extra checks for (intc->irqs[i]) in error/remove path was moved from
> >    "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS
> >    interrupts" to this patch
> > v1->v2:
> > - https://patchwork.kernel.org/patch/11069757/
> > ---
> >   drivers/irqchip/irq-pruss-intc.c | 29 ++++++++++++++++++++++++-----
> >   1 file changed, 24 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c
> > index 45b966a..cf9a59b 100644
> > --- a/drivers/irqchip/irq-pruss-intc.c
> > +++ b/drivers/irqchip/irq-pruss-intc.c
> > @@ -474,7 +474,7 @@ static int pruss_intc_probe(struct platform_device *pdev)
> >       struct pruss_intc *intc;
> >       struct pruss_host_irq_data *host_data[MAX_NUM_HOST_IRQS] = { NULL };
> >       int i, irq, ret;
> > -     u8 max_system_events;
> > +     u8 max_system_events, invalid_intr = 0;
> >
> >       data = of_device_get_match_data(dev);
> >       if (!data)
> > @@ -496,6 +496,16 @@ static int pruss_intc_probe(struct platform_device *pdev)
> >               return PTR_ERR(intc->base);
> >       }
> >
> > +     ret = of_property_read_u8(dev->of_node, "ti,irqs-reserved",
> > +                               &invalid_intr);
>
> Why not make the variable name match the property name?

Sure, I will rename this variable.

Thank you for your review,
Grzegorz
diff mbox series

Patch

diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c
index 45b966a..cf9a59b 100644
--- a/drivers/irqchip/irq-pruss-intc.c
+++ b/drivers/irqchip/irq-pruss-intc.c
@@ -474,7 +474,7 @@  static int pruss_intc_probe(struct platform_device *pdev)
 	struct pruss_intc *intc;
 	struct pruss_host_irq_data *host_data[MAX_NUM_HOST_IRQS] = { NULL };
 	int i, irq, ret;
-	u8 max_system_events;
+	u8 max_system_events, invalid_intr = 0;
 
 	data = of_device_get_match_data(dev);
 	if (!data)
@@ -496,6 +496,16 @@  static int pruss_intc_probe(struct platform_device *pdev)
 		return PTR_ERR(intc->base);
 	}
 
+	ret = of_property_read_u8(dev->of_node, "ti,irqs-reserved",
+				  &invalid_intr);
+
+	/*
+	 * The irqs-reserved is used only for some SoC's therefore not having
+	 * this property is still valid
+	 */
+	if (ret < 0 && ret != -EINVAL)
+		return ret;
+
 	pruss_intc_init(intc);
 
 	mutex_init(&intc->lock);
@@ -506,6 +516,9 @@  static int pruss_intc_probe(struct platform_device *pdev)
 		return -ENOMEM;
 
 	for (i = 0; i < MAX_NUM_HOST_IRQS; i++) {
+		if (invalid_intr & BIT(i))
+			continue;
+
 		irq = platform_get_irq_byname(pdev, irq_names[i]);
 		if (irq <= 0) {
 			dev_err(dev, "platform_get_irq_byname failed for %s : %d\n",
@@ -533,8 +546,11 @@  static int pruss_intc_probe(struct platform_device *pdev)
 	return 0;
 
 fail_irq:
-	while (--i >= 0)
-		irq_set_chained_handler_and_data(intc->irqs[i], NULL, NULL);
+	while (--i >= 0) {
+		if (intc->irqs[i])
+			irq_set_chained_handler_and_data(intc->irqs[i], NULL,
+							 NULL);
+	}
 
 	irq_domain_remove(intc->domain);
 
@@ -548,8 +564,11 @@  static int pruss_intc_remove(struct platform_device *pdev)
 	unsigned int hwirq;
 	int i;
 
-	for (i = 0; i < MAX_NUM_HOST_IRQS; i++)
-		irq_set_chained_handler_and_data(intc->irqs[i], NULL, NULL);
+	for (i = 0; i < MAX_NUM_HOST_IRQS; i++) {
+		if (intc->irqs[i])
+			irq_set_chained_handler_and_data(intc->irqs[i], NULL,
+							 NULL);
+	}
 
 	for (hwirq = 0; hwirq < max_system_events; hwirq++)
 		irq_dispose_mapping(irq_find_mapping(intc->domain, hwirq));