| Message ID | 159597950612.12744.7213388116029286561.stgit@bmoger-ubuntu (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | SVM cleanup and INVPCID support for the AMD guests | expand |
On Tue, Jul 28, 2020 at 4:38 PM Babu Moger <babu.moger@amd.com> wrote: > > The new intercept bits have been added in vmcb control area to support > few more interceptions. Here are the some of them. > - INTERCEPT_INVLPGB, > - INTERCEPT_INVLPGB_ILLEGAL, > - INTERCEPT_INVPCID, > - INTERCEPT_MCOMMIT, > - INTERCEPT_TLBSYNC, > > Add new intercept vector in vmcb_control_area to support these instructions. > Also update kvm_nested_vmrun trace function to support the new addition. > > AMD documentation for these instructions is available at "AMD64 > Architecture Programmer’s Manual Volume 2: System Programming, Pub. 24593 > Rev. 3.34(or later)" > > The documentation can be obtained at the links below: > Link: https://www.amd.com/system/files/TechDocs/24593.pdf > Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 > > Signed-off-by: Babu Moger <babu.moger@amd.com> > --- > @@ -16,6 +16,7 @@ enum vector_offset { > EXCEPTION_VECTOR, > INTERCEPT_VECTOR_3, > INTERCEPT_VECTOR_4, > + INTERCEPT_VECTOR_5, > MAX_VECTORS, > }; Is this enumeration actually adding any value? vmcb->control.intercepts[INTERCEPT_VECTOR_5] doesn't seem in any way "better" than just vmcb->control.intercepts[5]. Reviewed-by: Jim Mattson <jmattson@google.com>
> -----Original Message----- > From: Jim Mattson <jmattson@google.com> > Sent: Wednesday, July 29, 2020 4:24 PM > To: Moger, Babu <Babu.Moger@amd.com> > Cc: Paolo Bonzini <pbonzini@redhat.com>; Vitaly Kuznetsov > <vkuznets@redhat.com>; Wanpeng Li <wanpengli@tencent.com>; Sean > Christopherson <sean.j.christopherson@intel.com>; kvm list > <kvm@vger.kernel.org>; Joerg Roedel <joro@8bytes.org>; the arch/x86 > maintainers <x86@kernel.org>; LKML <linux-kernel@vger.kernel.org>; Ingo > Molnar <mingo@redhat.com>; Borislav Petkov <bp@alien8.de>; H . Peter Anvin > <hpa@zytor.com>; Thomas Gleixner <tglx@linutronix.de> > Subject: Re: [PATCH v3 06/11] KVM: SVM: Add new intercept vector in > vmcb_control_area > > On Tue, Jul 28, 2020 at 4:38 PM Babu Moger <babu.moger@amd.com> wrote: > > > > The new intercept bits have been added in vmcb control area to support > > few more interceptions. Here are the some of them. > > - INTERCEPT_INVLPGB, > > - INTERCEPT_INVLPGB_ILLEGAL, > > - INTERCEPT_INVPCID, > > - INTERCEPT_MCOMMIT, > > - INTERCEPT_TLBSYNC, > > > > Add new intercept vector in vmcb_control_area to support these instructions. > > Also update kvm_nested_vmrun trace function to support the new addition. > > > > AMD documentation for these instructions is available at "AMD64 > > Architecture Programmer’s Manual Volume 2: System Programming, Pub. > > 24593 Rev. 3.34(or later)" > > > > The documentation can be obtained at the links below: > > Link: > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww. > > > amd.com%2Fsystem%2Ffiles%2FTechDocs%2F24593.pdf&data=02%7C01% > 7Cbab > > > u.moger%40amd.com%7C04dafd87052d4ed59f9808d83405b0a4%7C3dd8961fe > 4884e6 > > > 08e11a82d994e183d%7C0%7C0%7C637316547054108593&sdata=2ncYK2 > NY1J3xL > > 9ZXSdb24zq0M0ZkF0iy%2FIW7SUDoFeg%3D&reserved=0 > > Link: > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz > > > illa.kernel.org%2Fshow_bug.cgi%3Fid%3D206537&data=02%7C01%7Cbab > u.m > > > oger%40amd.com%7C04dafd87052d4ed59f9808d83405b0a4%7C3dd8961fe488 > 4e608e > > > 11a82d994e183d%7C0%7C0%7C637316547054108593&sdata=Trw3tJE1Z6 > dOTXi0 > > DbPhOUAh4Ulr7HxxoJNpM2IjbvM%3D&reserved=0 > > > > Signed-off-by: Babu Moger <babu.moger@amd.com> > > --- > > > @@ -16,6 +16,7 @@ enum vector_offset { > > EXCEPTION_VECTOR, > > INTERCEPT_VECTOR_3, > > INTERCEPT_VECTOR_4, > > + INTERCEPT_VECTOR_5, > > MAX_VECTORS, > > }; > > Is this enumeration actually adding any value? Yea. It is not much of a value add. It helps readability a little bit. That’s why I kept that way. Thanks > vmcb->control.intercepts[INTERCEPT_VECTOR_5] doesn't seem in any way > "better" than just vmcb->control.intercepts[5]. > > Reviewed-by: Jim Mattson <jmattson@google.com>
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index aa9f1d62db29..75cbcfb81332 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -16,6 +16,7 @@ enum vector_offset { EXCEPTION_VECTOR, INTERCEPT_VECTOR_3, INTERCEPT_VECTOR_4, + INTERCEPT_VECTOR_5, MAX_VECTORS, }; @@ -124,6 +125,12 @@ enum { INTERCEPT_MWAIT_COND, INTERCEPT_XSETBV, INTERCEPT_RDPRU, + /* Byte offset 014h (Vector 5) */ + INTERCEPT_INVLPGB = 160, + INTERCEPT_INVLPGB_ILLEGAL, + INTERCEPT_INVPCID, + INTERCEPT_MCOMMIT, + INTERCEPT_TLBSYNC, }; diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c index d2552de42fb1..b0e47f474bb6 100644 --- a/arch/x86/kvm/svm/nested.c +++ b/arch/x86/kvm/svm/nested.c @@ -432,7 +432,8 @@ int nested_svm_vmrun(struct vcpu_svm *svm) nested_vmcb->control.intercepts[CR_VECTOR] >> 16, nested_vmcb->control.intercepts[EXCEPTION_VECTOR], nested_vmcb->control.intercepts[INTERCEPT_VECTOR_3], - nested_vmcb->control.intercepts[INTERCEPT_VECTOR_4]); + nested_vmcb->control.intercepts[INTERCEPT_VECTOR_4], + nested_vmcb->control.intercepts[INTERCEPT_VECTOR_5]); /* Clear internal status */ kvm_clear_exception_queue(&svm->vcpu); diff --git a/arch/x86/kvm/trace.h b/arch/x86/kvm/trace.h index 6e7262229e6a..11046171b5d9 100644 --- a/arch/x86/kvm/trace.h +++ b/arch/x86/kvm/trace.h @@ -544,9 +544,10 @@ TRACE_EVENT(kvm_nested_vmrun, ); TRACE_EVENT(kvm_nested_intercepts, - TP_PROTO(__u16 cr_read, __u16 cr_write, __u32 exceptions, __u32 intercept1, - __u32 intercept2), - TP_ARGS(cr_read, cr_write, exceptions, intercept1, intercept2), + TP_PROTO(__u16 cr_read, __u16 cr_write, __u32 exceptions, + __u32 intercept1, __u32 intercept2, __u32 intercept3), + TP_ARGS(cr_read, cr_write, exceptions, intercept1, + intercept2, intercept3), TP_STRUCT__entry( __field( __u16, cr_read ) @@ -554,6 +555,7 @@ TRACE_EVENT(kvm_nested_intercepts, __field( __u32, exceptions ) __field( __u32, intercept1 ) __field( __u32, intercept2 ) + __field( __u32, intercept3 ) ), TP_fast_assign( @@ -562,12 +564,13 @@ TRACE_EVENT(kvm_nested_intercepts, __entry->exceptions = exceptions; __entry->intercept1 = intercept1; __entry->intercept2 = intercept2; + __entry->intercept3 = intercept3; ), TP_printk("cr_read: %04x cr_write: %04x excp: %08x " - "intercept1: %08x intercept2: %08x", + "intercept1: %08x intercept2: %08x intercept3: %08x", __entry->cr_read, __entry->cr_write, __entry->exceptions, - __entry->intercept1, __entry->intercept2) + __entry->intercept1, __entry->intercept2, __entry->intercept3) ); /* * Tracepoint for #VMEXIT while nested
The new intercept bits have been added in vmcb control area to support few more interceptions. Here are the some of them. - INTERCEPT_INVLPGB, - INTERCEPT_INVLPGB_ILLEGAL, - INTERCEPT_INVPCID, - INTERCEPT_MCOMMIT, - INTERCEPT_TLBSYNC, Add new intercept vector in vmcb_control_area to support these instructions. Also update kvm_nested_vmrun trace function to support the new addition. AMD documentation for these instructions is available at "AMD64 Architecture Programmer’s Manual Volume 2: System Programming, Pub. 24593 Rev. 3.34(or later)" The documentation can be obtained at the links below: Link: https://www.amd.com/system/files/TechDocs/24593.pdf Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Signed-off-by: Babu Moger <babu.moger@amd.com> --- arch/x86/include/asm/svm.h | 7 +++++++ arch/x86/kvm/svm/nested.c | 3 ++- arch/x86/kvm/trace.h | 13 ++++++++----- 3 files changed, 17 insertions(+), 6 deletions(-)