| Message ID | 20200727111218.26926-1-ceggers@arri.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | eeprom: at25: allow page sizes greater than 16 bit | expand |
Ping? On Monday, 27 July 2020, 13:12:18 CEST, Christian Eggers wrote: > Storage technologies like FRAM have no "write pages", the whole chip can > be written within one SPI transfer. For these chips, the page size can > be set equal to the device size. Currently available devices are already > bigger than 64 kiB. > > Signed-off-by: Christian Eggers <ceggers@arri.de> > --- > drivers/misc/eeprom/at25.c | 2 +- > include/linux/spi/eeprom.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c > index cde9a2fc1325..0e7c8dc01195 100644 > --- a/drivers/misc/eeprom/at25.c > +++ b/drivers/misc/eeprom/at25.c > @@ -261,7 +261,7 @@ static int at25_fw_to_chip(struct device *dev, struct > spi_eeprom *chip) > > if (device_property_read_u32(dev, "pagesize", &val) == 0 || > device_property_read_u32(dev, "at25,page-size", &val) == 0) { > - chip->page_size = (u16)val; > + chip->page_size = val; > } else { > dev_err(dev, "Error: missing \"pagesize\" property\n"); > return -ENODEV; > diff --git a/include/linux/spi/eeprom.h b/include/linux/spi/eeprom.h > index aceccf9c71fb..1cca3dd5a748 100644 > --- a/include/linux/spi/eeprom.h > +++ b/include/linux/spi/eeprom.h > @@ -14,7 +14,7 @@ > struct spi_eeprom { > u32 byte_len; > char name[10]; > - u16 page_size; /* for writes */ > + u32 page_size; /* for writes */ > u16 flags; > #define EE_ADDR1 0x0001 /* 8 bit addrs */ > #define EE_ADDR2 0x0002 /* 16 bit addrs */
On Tue, Aug 04, 2020 at 08:40:52AM +0200, Christian Eggers wrote:
> Ping?
It's the middle of the merge window now, I can't take any patches for
the next 2 weeks, sorry. It is in my queue, and will be looked at after
5.9-rc1 is out.
thanks,
greg k-h
diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c index cde9a2fc1325..0e7c8dc01195 100644 --- a/drivers/misc/eeprom/at25.c +++ b/drivers/misc/eeprom/at25.c @@ -261,7 +261,7 @@ static int at25_fw_to_chip(struct device *dev, struct spi_eeprom *chip) if (device_property_read_u32(dev, "pagesize", &val) == 0 || device_property_read_u32(dev, "at25,page-size", &val) == 0) { - chip->page_size = (u16)val; + chip->page_size = val; } else { dev_err(dev, "Error: missing \"pagesize\" property\n"); return -ENODEV; diff --git a/include/linux/spi/eeprom.h b/include/linux/spi/eeprom.h index aceccf9c71fb..1cca3dd5a748 100644 --- a/include/linux/spi/eeprom.h +++ b/include/linux/spi/eeprom.h @@ -14,7 +14,7 @@ struct spi_eeprom { u32 byte_len; char name[10]; - u16 page_size; /* for writes */ + u32 page_size; /* for writes */ u16 flags; #define EE_ADDR1 0x0001 /* 8 bit addrs */ #define EE_ADDR2 0x0002 /* 16 bit addrs */
Storage technologies like FRAM have no "write pages", the whole chip can be written within one SPI transfer. For these chips, the page size can be set equal to the device size. Currently available devices are already bigger than 64 kiB. Signed-off-by: Christian Eggers <ceggers@arri.de> --- drivers/misc/eeprom/at25.c | 2 +- include/linux/spi/eeprom.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)