| Message ID | 20200804194052.193272-3-sean.v.kelley@intel.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | Add RCEC handling to PCI/AER | expand |
"git log --oneline" again. On Tue, Aug 04, 2020 at 12:40:45PM -0700, Sean V Kelley wrote: > From: Qiuxu Zhuo <qiuxu.zhuo@intel.com> > > If a Root Complex Integrated Endpoint (RCiEP) is implemented, errors may > optionally be sent to a corresponding Root Complex Event Collector (RCEC). > Each RCiEP must be associated with no more than one RCEC. Interface errors > are reported to the OS by RCECs. > > For an RCEC (technically not a Bridge), error messages "received" from > associated RCiEPs must be enabled for "transmission" in order to cause a > System Error via the Root Control register or (when the Advanced Error > Reporting Capability is present) reporting via the Root Error Command > register and logging in the Root Error Status register and Error Source > Identification register. > > Given the commonality with Root Ports and the need to also support AER > and PME services for RCECs, extend the Root Port driver to support RCEC > devices through the addition of the RCEC Class ID to the driver > structure. > > Co-developed-by: Sean V Kelley <sean.v.kelley@intel.com> > Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> > Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com> > --- > drivers/pci/pcie/portdrv_core.c | 8 ++++---- > drivers/pci/pcie/portdrv_pci.c | 5 ++++- > 2 files changed, 8 insertions(+), 5 deletions(-) > > diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c > index 50a9522ab07d..5d4a400094fc 100644 > --- a/drivers/pci/pcie/portdrv_core.c > +++ b/drivers/pci/pcie/portdrv_core.c > @@ -234,11 +234,11 @@ static int get_port_device_capability(struct pci_dev *dev) > #endif > > /* > - * Root ports are capable of generating PME too. Root Complex > - * Event Collectors can also generate PMEs, but we don't handle > - * those yet. > + * Root ports and Root Complex Event Collectors are capable > + * of generating PME too. > */ > - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && > + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || > + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && > (pcie_ports_native || host->native_pme)) { > services |= PCIE_PORT_SERVICE_PME; > > diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c > index 3a3ce40ae1ab..4d880679b9b1 100644 > --- a/drivers/pci/pcie/portdrv_pci.c > +++ b/drivers/pci/pcie/portdrv_pci.c > @@ -106,7 +106,8 @@ static int pcie_portdrv_probe(struct pci_dev *dev, > if (!pci_is_pcie(dev) || > ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && > (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && > - (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) > + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM) && > + (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) > return -ENODEV; > > status = pcie_port_device_register(dev); > @@ -195,6 +196,8 @@ static const struct pci_device_id port_pci_ids[] = { > { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) }, > /* subtractive decode PCI-to-PCI bridge, class type is 060401h */ > { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) }, > + /* handle any Root Complex Event Collector */ > + { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) }, > { }, > }; > > -- > 2.27.0 >
On Tue, 4 Aug 2020 12:40:45 -0700 Sean V Kelley <sean.v.kelley@intel.com> wrote: > From: Qiuxu Zhuo <qiuxu.zhuo@intel.com> > > If a Root Complex Integrated Endpoint (RCiEP) is implemented, errors may > optionally be sent to a corresponding Root Complex Event Collector (RCEC). > Each RCiEP must be associated with no more than one RCEC. Interface errors > are reported to the OS by RCECs. > > For an RCEC (technically not a Bridge), error messages "received" from > associated RCiEPs must be enabled for "transmission" in order to cause a > System Error via the Root Control register or (when the Advanced Error > Reporting Capability is present) reporting via the Root Error Command > register and logging in the Root Error Status register and Error Source > Identification register. > > Given the commonality with Root Ports and the need to also support AER > and PME services for RCECs, extend the Root Port driver to support RCEC > devices through the addition of the RCEC Class ID to the driver > structure. > > Co-developed-by: Sean V Kelley <sean.v.kelley@intel.com> > Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> > Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com> One trivial thing inline. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > drivers/pci/pcie/portdrv_core.c | 8 ++++---- > drivers/pci/pcie/portdrv_pci.c | 5 ++++- > 2 files changed, 8 insertions(+), 5 deletions(-) > > diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c > index 50a9522ab07d..5d4a400094fc 100644 > --- a/drivers/pci/pcie/portdrv_core.c > +++ b/drivers/pci/pcie/portdrv_core.c > @@ -234,11 +234,11 @@ static int get_port_device_capability(struct pci_dev *dev) > #endif > > /* > - * Root ports are capable of generating PME too. Root Complex > - * Event Collectors can also generate PMEs, but we don't handle > - * those yet. > + * Root ports and Root Complex Event Collectors are capable > + * of generating PME too. I'm not sure what the 'too' refers to. I'd just drop it and avoid any possible confusion! > */ > - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && > + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || > + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && > (pcie_ports_native || host->native_pme)) { > services |= PCIE_PORT_SERVICE_PME; > > diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c > index 3a3ce40ae1ab..4d880679b9b1 100644 > --- a/drivers/pci/pcie/portdrv_pci.c > +++ b/drivers/pci/pcie/portdrv_pci.c > @@ -106,7 +106,8 @@ static int pcie_portdrv_probe(struct pci_dev *dev, > if (!pci_is_pcie(dev) || > ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && > (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && > - (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) > + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM) && > + (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) > return -ENODEV; > > status = pcie_port_device_register(dev); > @@ -195,6 +196,8 @@ static const struct pci_device_id port_pci_ids[] = { > { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) }, > /* subtractive decode PCI-to-PCI bridge, class type is 060401h */ > { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) }, > + /* handle any Root Complex Event Collector */ > + { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) }, > { }, > }; >
On 5 Aug 2020, at 10:45, Jonathan Cameron wrote: > On Tue, 4 Aug 2020 12:40:45 -0700 > Sean V Kelley <sean.v.kelley@intel.com> wrote: > >> From: Qiuxu Zhuo <qiuxu.zhuo@intel.com> >> >> If a Root Complex Integrated Endpoint (RCiEP) is implemented, errors >> may >> optionally be sent to a corresponding Root Complex Event Collector >> (RCEC). >> Each RCiEP must be associated with no more than one RCEC. Interface >> errors >> are reported to the OS by RCECs. >> >> For an RCEC (technically not a Bridge), error messages "received" >> from >> associated RCiEPs must be enabled for "transmission" in order to >> cause a >> System Error via the Root Control register or (when the Advanced >> Error >> Reporting Capability is present) reporting via the Root Error Command >> register and logging in the Root Error Status register and Error >> Source >> Identification register. >> >> Given the commonality with Root Ports and the need to also support >> AER >> and PME services for RCECs, extend the Root Port driver to support >> RCEC >> devices through the addition of the RCEC Class ID to the driver >> structure. >> >> Co-developed-by: Sean V Kelley <sean.v.kelley@intel.com> >> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> >> Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com> > One trivial thing inline. > > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > > >> --- >> drivers/pci/pcie/portdrv_core.c | 8 ++++---- >> drivers/pci/pcie/portdrv_pci.c | 5 ++++- >> 2 files changed, 8 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/pci/pcie/portdrv_core.c >> b/drivers/pci/pcie/portdrv_core.c >> index 50a9522ab07d..5d4a400094fc 100644 >> --- a/drivers/pci/pcie/portdrv_core.c >> +++ b/drivers/pci/pcie/portdrv_core.c >> @@ -234,11 +234,11 @@ static int get_port_device_capability(struct >> pci_dev *dev) >> #endif >> >> /* >> - * Root ports are capable of generating PME too. Root Complex >> - * Event Collectors can also generate PMEs, but we don't handle >> - * those yet. >> + * Root ports and Root Complex Event Collectors are capable >> + * of generating PME too. > > I'm not sure what the 'too' refers to. I'd just drop it and avoid > any possible confusion! Paste error of text. Will correct. Thanks, Sean > >> */ >> - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && >> + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || >> + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && >> (pcie_ports_native || host->native_pme)) { >> services |= PCIE_PORT_SERVICE_PME; >> >> diff --git a/drivers/pci/pcie/portdrv_pci.c >> b/drivers/pci/pcie/portdrv_pci.c >> index 3a3ce40ae1ab..4d880679b9b1 100644 >> --- a/drivers/pci/pcie/portdrv_pci.c >> +++ b/drivers/pci/pcie/portdrv_pci.c >> @@ -106,7 +106,8 @@ static int pcie_portdrv_probe(struct pci_dev >> *dev, >> if (!pci_is_pcie(dev) || >> ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && >> (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && >> - (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) >> + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM) && >> + (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) >> return -ENODEV; >> >> status = pcie_port_device_register(dev); >> @@ -195,6 +196,8 @@ static const struct pci_device_id port_pci_ids[] >> = { >> { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) }, >> /* subtractive decode PCI-to-PCI bridge, class type is 060401h */ >> { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) }, >> + /* handle any Root Complex Event Collector */ >> + { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) }, >> { }, >> }; >>
On 5 Aug 2020, at 10:43, Bjorn Helgaas wrote: > "git log --oneline" again. Rewording lost track of the first line. Argh, will fix. > > On Tue, Aug 04, 2020 at 12:40:45PM -0700, Sean V Kelley wrote: >> From: Qiuxu Zhuo <qiuxu.zhuo@intel.com> >> >> If a Root Complex Integrated Endpoint (RCiEP) is implemented, errors >> may >> optionally be sent to a corresponding Root Complex Event Collector >> (RCEC). >> Each RCiEP must be associated with no more than one RCEC. Interface >> errors >> are reported to the OS by RCECs. >> >> For an RCEC (technically not a Bridge), error messages "received" >> from >> associated RCiEPs must be enabled for "transmission" in order to >> cause a >> System Error via the Root Control register or (when the Advanced >> Error >> Reporting Capability is present) reporting via the Root Error Command >> register and logging in the Root Error Status register and Error >> Source >> Identification register. >> >> Given the commonality with Root Ports and the need to also support >> AER >> and PME services for RCECs, extend the Root Port driver to support >> RCEC >> devices through the addition of the RCEC Class ID to the driver >> structure. >> >> Co-developed-by: Sean V Kelley <sean.v.kelley@intel.com> >> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> >> Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com> >> --- >> drivers/pci/pcie/portdrv_core.c | 8 ++++---- >> drivers/pci/pcie/portdrv_pci.c | 5 ++++- >> 2 files changed, 8 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/pci/pcie/portdrv_core.c >> b/drivers/pci/pcie/portdrv_core.c >> index 50a9522ab07d..5d4a400094fc 100644 >> --- a/drivers/pci/pcie/portdrv_core.c >> +++ b/drivers/pci/pcie/portdrv_core.c >> @@ -234,11 +234,11 @@ static int get_port_device_capability(struct >> pci_dev *dev) >> #endif >> >> /* >> - * Root ports are capable of generating PME too. Root Complex >> - * Event Collectors can also generate PMEs, but we don't handle >> - * those yet. >> + * Root ports and Root Complex Event Collectors are capable >> + * of generating PME too. >> */ >> - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && >> + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || >> + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && >> (pcie_ports_native || host->native_pme)) { >> services |= PCIE_PORT_SERVICE_PME; >> >> diff --git a/drivers/pci/pcie/portdrv_pci.c >> b/drivers/pci/pcie/portdrv_pci.c >> index 3a3ce40ae1ab..4d880679b9b1 100644 >> --- a/drivers/pci/pcie/portdrv_pci.c >> +++ b/drivers/pci/pcie/portdrv_pci.c >> @@ -106,7 +106,8 @@ static int pcie_portdrv_probe(struct pci_dev >> *dev, >> if (!pci_is_pcie(dev) || >> ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && >> (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && >> - (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) >> + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM) && >> + (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) >> return -ENODEV; >> >> status = pcie_port_device_register(dev); >> @@ -195,6 +196,8 @@ static const struct pci_device_id port_pci_ids[] >> = { >> { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) }, >> /* subtractive decode PCI-to-PCI bridge, class type is 060401h */ >> { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) }, >> + /* handle any Root Complex Event Collector */ >> + { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) }, >> { }, >> }; >> >> -- >> 2.27.0 >>
On 8/4/20 12:40 PM, Sean V Kelley wrote: > From: Qiuxu Zhuo <qiuxu.zhuo@intel.com> > > If a Root Complex Integrated Endpoint (RCiEP) is implemented, errors may > optionally be sent to a corresponding Root Complex Event Collector (RCEC). > Each RCiEP must be associated with no more than one RCEC. Interface errors > are reported to the OS by RCECs. > > For an RCEC (technically not a Bridge), error messages "received" from > associated RCiEPs must be enabled for "transmission" in order to cause a > System Error via the Root Control register or (when the Advanced Error > Reporting Capability is present) reporting via the Root Error Command > register and logging in the Root Error Status register and Error Source > Identification register. > > Given the commonality with Root Ports and the need to also support AER > and PME services for RCECs, extend the Root Port driver to support RCEC > devices through the addition of the RCEC Class ID to the driver > structure. > > Co-developed-by: Sean V Kelley <sean.v.kelley@intel.com> > Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> > Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com> > --- > drivers/pci/pcie/portdrv_core.c | 8 ++++---- > drivers/pci/pcie/portdrv_pci.c | 5 ++++- > 2 files changed, 8 insertions(+), 5 deletions(-) > > diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c > index 50a9522ab07d..5d4a400094fc 100644 > --- a/drivers/pci/pcie/portdrv_core.c > +++ b/drivers/pci/pcie/portdrv_core.c > @@ -234,11 +234,11 @@ static int get_port_device_capability(struct pci_dev *dev) > #endif > > /* > - * Root ports are capable of generating PME too. Root Complex > - * Event Collectors can also generate PMEs, but we don't handle > - * those yet. > + * Root ports and Root Complex Event Collectors are capable > + * of generating PME too. > */ > - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && > + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || > + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && > (pcie_ports_native || host->native_pme)) { > services |= PCIE_PORT_SERVICE_PME; What about AER service? Don't you need to enable it for RCEC? > > diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c > index 3a3ce40ae1ab..4d880679b9b1 100644 > --- a/drivers/pci/pcie/portdrv_pci.c > +++ b/drivers/pci/pcie/portdrv_pci.c > @@ -106,7 +106,8 @@ static int pcie_portdrv_probe(struct pci_dev *dev, > if (!pci_is_pcie(dev) || > ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && > (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && > - (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) > + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM) && > + (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) > return -ENODEV; > > status = pcie_port_device_register(dev); > @@ -195,6 +196,8 @@ static const struct pci_device_id port_pci_ids[] = { > { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) }, > /* subtractive decode PCI-to-PCI bridge, class type is 060401h */ > { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) }, > + /* handle any Root Complex Event Collector */ > + { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) }, > { }, > }; > >
Hi Sathya, Thanks for reviewing. If you haven't see it already there are newer patches under v3 here: https://lore.kernel.org/linux-pci/20200812164659.1118946-1-sean.v.kelley@intel.com/ Comments below: On Wed, 2020-08-26 at 09:16 -0700, Kuppuswamy, Sathyanarayanan wrote: > > On 8/4/20 12:40 PM, Sean V Kelley wrote: > > From: Qiuxu Zhuo <qiuxu.zhuo@intel.com> > > > > If a Root Complex Integrated Endpoint (RCiEP) is implemented, > > errors may > > optionally be sent to a corresponding Root Complex Event Collector > > (RCEC). > > Each RCiEP must be associated with no more than one RCEC. Interface > > errors > > are reported to the OS by RCECs. > > > > For an RCEC (technically not a Bridge), error messages "received" > > from > > associated RCiEPs must be enabled for "transmission" in order to > > cause a > > System Error via the Root Control register or (when the Advanced > > Error > > Reporting Capability is present) reporting via the Root Error > > Command > > register and logging in the Root Error Status register and Error > > Source > > Identification register. > > > > Given the commonality with Root Ports and the need to also support > > AER > > and PME services for RCECs, extend the Root Port driver to support > > RCEC > > devices through the addition of the RCEC Class ID to the driver > > structure. > > > > Co-developed-by: Sean V Kelley <sean.v.kelley@intel.com> > > Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> > > Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com> > > --- > > drivers/pci/pcie/portdrv_core.c | 8 ++++---- > > drivers/pci/pcie/portdrv_pci.c | 5 ++++- > > 2 files changed, 8 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/pci/pcie/portdrv_core.c > > b/drivers/pci/pcie/portdrv_core.c > > index 50a9522ab07d..5d4a400094fc 100644 > > --- a/drivers/pci/pcie/portdrv_core.c > > +++ b/drivers/pci/pcie/portdrv_core.c > > @@ -234,11 +234,11 @@ static int get_port_device_capability(struct > > pci_dev *dev) > > #endif > > > > /* > > - * Root ports are capable of generating PME too. Root Complex > > - * Event Collectors can also generate PMEs, but we don't handle > > - * those yet. > > + * Root ports and Root Complex Event Collectors are capable > > + * of generating PME too. > > */ > > - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && > > + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || > > + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && > > (pcie_ports_native || host->native_pme)) { > > services |= PCIE_PORT_SERVICE_PME; > What about AER service? Don't you need to enable it for RCEC It is enabled via set_device_error_reporting() in aer.c and in not seen in this patch but in the lines above the code section you are commenting on is: #ifdef CONFIG_PCIEAER if (dev->aer_cap && pci_aer_available() && (pcie_ports_native || host->native_aer)) { services |= PCIE_PORT_SERVICE_AER; /* * Disable AER on this port in case it's been enabled by the * BIOS (the AER service driver will enable it when necessary). */ pci_disable_pcie_error_reporting(dev); } #endif Let me know if I'm missing something here. Thanks! Sean > > > > diff --git a/drivers/pci/pcie/portdrv_pci.c > > b/drivers/pci/pcie/portdrv_pci.c > > index 3a3ce40ae1ab..4d880679b9b1 100644 > > --- a/drivers/pci/pcie/portdrv_pci.c > > +++ b/drivers/pci/pcie/portdrv_pci.c > > @@ -106,7 +106,8 @@ static int pcie_portdrv_probe(struct pci_dev > > *dev, > > if (!pci_is_pcie(dev) || > > ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && > > (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && > > - (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) > > + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM) && > > + (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) > > return -ENODEV; > > > > status = pcie_port_device_register(dev); > > @@ -195,6 +196,8 @@ static const struct pci_device_id > > port_pci_ids[] = { > > { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) }, > > /* subtractive decode PCI-to-PCI bridge, class type is 060401h > > */ > > { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) }, > > + /* handle any Root Complex Event Collector */ > > + { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) > > }, > > { }, > > }; > > > >
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 50a9522ab07d..5d4a400094fc 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -234,11 +234,11 @@ static int get_port_device_capability(struct pci_dev *dev) #endif /* - * Root ports are capable of generating PME too. Root Complex - * Event Collectors can also generate PMEs, but we don't handle - * those yet. + * Root ports and Root Complex Event Collectors are capable + * of generating PME too. */ - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && (pcie_ports_native || host->native_pme)) { services |= PCIE_PORT_SERVICE_PME; diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index 3a3ce40ae1ab..4d880679b9b1 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -106,7 +106,8 @@ static int pcie_portdrv_probe(struct pci_dev *dev, if (!pci_is_pcie(dev) || ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && - (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM) && + (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) return -ENODEV; status = pcie_port_device_register(dev); @@ -195,6 +196,8 @@ static const struct pci_device_id port_pci_ids[] = { { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) }, /* subtractive decode PCI-to-PCI bridge, class type is 060401h */ { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) }, + /* handle any Root Complex Event Collector */ + { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) }, { }, };