| Message ID | 1313147667-3385-1-git-send-email-jaswinder.singh@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, 2011-08-12 at 16:44 +0530, Jassi Brar wrote: > Define a new api that could be used for doing fancy data transfers > like interleaved to contiguous copy and vice-versa. > Traditional SG_list based transfers tend to be very inefficient in > such cases as where the interleave and chunk are only a few bytes, > which call for a very condensed api to convey pattern of the transfer. > > This api supports all 4 variants of scatter-gather and contiguous transfer. > Besides, it could also represent common operations like > device_prep_dma_{cyclic, memset, memcpy} > and maybe some more that I am not sure of. > > Of course, neither can this api help transfers that don't lend to DMA by > nature, i.e, scattered tiny read/writes with no periodic pattern. > > Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> > --- > include/linux/dmaengine.h | 73 +++++++++++++++++++++++++++++++++++++++++++++ > 1 files changed, 73 insertions(+), 0 deletions(-) > > diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h > index 8fbf40e..74f3ae0 100644 > --- a/include/linux/dmaengine.h > +++ b/include/linux/dmaengine.h > @@ -76,6 +76,76 @@ enum dma_transaction_type { > /* last transaction type for creation of the capabilities mask */ > #define DMA_TX_TYPE_END (DMA_CYCLIC + 1) > > +/** > + * Generic Transfer Request > + * ------------------------ > + * A chunk is collection of contiguous bytes to be transfered. > + * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG). > + * ICGs may or maynot change between chunks. > + * A FRAME is the smallest series of contiguous {chunk,icg} pairs, > + * that when repeated an integral number of times, specifies the transfer. > + * A transfer template is specification of a Frame, the number of times > + * it is to be repeated and other per-transfer attributes. > + * > + * Practically, a client driver would have ready a template for each > + * type of transfer it is going to need during its lifetime and > + * set only 'src_start' and 'dst_start' before submitting the requests. > + * > + * > + * | Frame-1 | Frame-2 | ~ | Frame-'numf' | > + * |====....==.===...=...|====....==.===...=...| ~ |====....==.===...=...| > + * > + * == Chunk size > + * ... ICG > + */ > + > +/** > + * struct data_chunk - Element of scatter-gather list that makes a frame. > + * @size: Number of bytes to read from source. > + * size_dst := fn(op, size_src), so doesn't mean much for destination. > + * @icg: Number of bytes to jump after last src/dst address of this > + * chunk and before first src/dst address for next chunk. > + * Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false. > + * Ignored for src(assumed 0), if src_inc is true and src_sgl is false. > + */ > +struct data_chunk { > + size_t size; > + size_t icg; > +}; > + > +/** > + * struct xfer_template - Template to convey DMAC the transfer pattern > + * and attributes. > + * @op: The operation to perform on source data before writing it on > + * to destination address. > + * @src_start: Bus address of source for the first chunk. > + * @dst_start: Bus address of destination for the first chunk. > + * @src_inc: If the source address increments after reading from it. > + * @dst_inc: If the destination address increments after writing to it. > + * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read). > + * Otherwise, source is read contiguously (icg ignored). > + * Ignored if src_inc is false. > + * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write). > + * Otherwise, destination is filled contiguously (icg ignored). > + * Ignored if dst_inc is false. > + * @frm_irq: If the client expects DMAC driver to do callback after each frame. > + * @numf: Number of frames in this template. > + * @frame_size: Number of chunks in a frame i.e, size of sgl[]. > + * @sgl: Array of {chunk,icg} pairs that make up a frame. > + */ > +struct xfer_template { > + enum dma_transaction_type op; > + dma_addr_t src_start; > + dma_addr_t dst_start; > + bool src_inc; > + bool dst_inc; > + bool src_sgl; > + bool dst_sgl; > + bool frm_irq; > + size_t numf; > + size_t frame_size; > + struct data_chunk sgl[0]; > +}; > > /** > * enum dma_ctrl_flags - DMA flags to augment operation preparation, > @@ -432,6 +502,7 @@ struct dma_tx_state { > * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio. > * The function takes a buffer of size buf_len. The callback function will > * be called after period_len bytes have been transferred. > + * @device_prep_dma_genxfer: Transfer expression in a generic way. > * @device_control: manipulate all pending operations on a channel, returns > * zero or error code > * @device_tx_status: poll for transaction completion, the optional > @@ -496,6 +567,8 @@ struct dma_device { > struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)( > struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, > size_t period_len, enum dma_data_direction direction); > + struct dma_async_tx_descriptor *(*device_prep_dma_genxfer)( > + struct dma_chan *chan, struct xfer_template *xt); > int (*device_control)(struct dma_chan *chan, enum dma_ctrl_cmd cmd, > unsigned long arg); > Do you have a driver which is using the API, would help to evaluate this API when we see the usage :) Currently we have two approaches to solve this problem first being the DMA_STRIDE_CONFIG proposed by Linus W, I feel this one is better approach as this can give client ability to configure each transfer rather than set for the channel. Linus W, do you agree? Sundaram, Does this fit to the usage you folks wanted?
On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod <vinod.koul@intel.com> wrote: > Currently we have two approaches to solve this problem first being the > DMA_STRIDE_CONFIG proposed by Linus W, I feel this one is better > approach as this can give client ability to configure each transfer > rather than set for the channel. Linus W, do you agree? I think Sundaram is in the position of doing some heavy work on using one or the other of the API:s, and I think he is better suited than anyone else of us to select what scheme to use, in the end he's going to write the first code using the API. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 16 August 2011 18:26, Koul, Vinod <vinod.koul@intel.com> wrote: > On Fri, 2011-08-12 at 16:44 +0530, Jassi Brar wrote: >> Define a new api that could be used for doing fancy data transfers >> like interleaved to contiguous copy and vice-versa. >> Traditional SG_list based transfers tend to be very inefficient in >> such cases as where the interleave and chunk are only a few bytes, >> which call for a very condensed api to convey pattern of the transfer. >> >> This api supports all 4 variants of scatter-gather and contiguous transfer. >> Besides, it could also represent common operations like >> device_prep_dma_{cyclic, memset, memcpy} >> and maybe some more that I am not sure of. >> >> Of course, neither can this api help transfers that don't lend to DMA by >> nature, i.e, scattered tiny read/writes with no periodic pattern. >> >> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> >> --- >> include/linux/dmaengine.h | 73 +++++++++++++++++++++++++++++++++++++++++++++ >> 1 files changed, 73 insertions(+), 0 deletions(-) >> >> diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h >> index 8fbf40e..74f3ae0 100644 >> --- a/include/linux/dmaengine.h >> +++ b/include/linux/dmaengine.h >> @@ -76,6 +76,76 @@ enum dma_transaction_type { >> /* last transaction type for creation of the capabilities mask */ >> #define DMA_TX_TYPE_END (DMA_CYCLIC + 1) >> >> +/** >> + * Generic Transfer Request >> + * ------------------------ >> + * A chunk is collection of contiguous bytes to be transfered. >> + * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG). >> + * ICGs may or maynot change between chunks. >> + * A FRAME is the smallest series of contiguous {chunk,icg} pairs, >> + * that when repeated an integral number of times, specifies the transfer. >> + * A transfer template is specification of a Frame, the number of times >> + * it is to be repeated and other per-transfer attributes. >> + * >> + * Practically, a client driver would have ready a template for each >> + * type of transfer it is going to need during its lifetime and >> + * set only 'src_start' and 'dst_start' before submitting the requests. >> + * >> + * >> + * | Frame-1 | Frame-2 | ~ | Frame-'numf' | >> + * |====....==.===...=...|====....==.===...=...| ~ |====....==.===...=...| >> + * >> + * == Chunk size >> + * ... ICG >> + */ >> + >> +/** >> + * struct data_chunk - Element of scatter-gather list that makes a frame. >> + * @size: Number of bytes to read from source. >> + * size_dst := fn(op, size_src), so doesn't mean much for destination. >> + * @icg: Number of bytes to jump after last src/dst address of this >> + * chunk and before first src/dst address for next chunk. >> + * Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false. >> + * Ignored for src(assumed 0), if src_inc is true and src_sgl is false. >> + */ >> +struct data_chunk { >> + size_t size; >> + size_t icg; >> +}; >> + >> +/** >> + * struct xfer_template - Template to convey DMAC the transfer pattern >> + * and attributes. >> + * @op: The operation to perform on source data before writing it on >> + * to destination address. >> + * @src_start: Bus address of source for the first chunk. >> + * @dst_start: Bus address of destination for the first chunk. >> + * @src_inc: If the source address increments after reading from it. >> + * @dst_inc: If the destination address increments after writing to it. >> + * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read). >> + * Otherwise, source is read contiguously (icg ignored). >> + * Ignored if src_inc is false. >> + * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write). >> + * Otherwise, destination is filled contiguously (icg ignored). >> + * Ignored if dst_inc is false. >> + * @frm_irq: If the client expects DMAC driver to do callback after each frame. >> + * @numf: Number of frames in this template. >> + * @frame_size: Number of chunks in a frame i.e, size of sgl[]. >> + * @sgl: Array of {chunk,icg} pairs that make up a frame. >> + */ >> +struct xfer_template { >> + enum dma_transaction_type op; >> + dma_addr_t src_start; >> + dma_addr_t dst_start; >> + bool src_inc; >> + bool dst_inc; >> + bool src_sgl; >> + bool dst_sgl; >> + bool frm_irq; >> + size_t numf; >> + size_t frame_size; >> + struct data_chunk sgl[0]; >> +}; >> >> /** >> * enum dma_ctrl_flags - DMA flags to augment operation preparation, >> @@ -432,6 +502,7 @@ struct dma_tx_state { >> * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio. >> * The function takes a buffer of size buf_len. The callback function will >> * be called after period_len bytes have been transferred. >> + * @device_prep_dma_genxfer: Transfer expression in a generic way. >> * @device_control: manipulate all pending operations on a channel, returns >> * zero or error code >> * @device_tx_status: poll for transaction completion, the optional >> @@ -496,6 +567,8 @@ struct dma_device { >> struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)( >> struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, >> size_t period_len, enum dma_data_direction direction); >> + struct dma_async_tx_descriptor *(*device_prep_dma_genxfer)( >> + struct dma_chan *chan, struct xfer_template *xt); >> int (*device_control)(struct dma_chan *chan, enum dma_ctrl_cmd cmd, >> unsigned long arg); >> > Do you have a driver which is using the API, would help to evaluate this > API when we see the usage :) Sorry, not in public and not for DMAENGINE. It will help if you see it as a generic[1] solution to the requirement of supporting interleaved transfers with DMACs like TI's EDMA, SDMA, ARM's PL330 and many more in future. > Currently we have two approaches to solve this problem first being the > DMA_STRIDE_CONFIG proposed by Linus W, I feel this one is better > approach as this can give client ability to configure each transfer > rather than set for the channel. To me, doing it via a control command vs new transfer type, is secondary to doing it in a generic way. And yes, I too believe this way is better because it is more flexible. [1] Btw, I haven't yet added option to specify byte/half-word/word swap while data transfer - which I once had to do with PL330 in a weird setup. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, 2011-08-16 at 15:06 +0200, Linus Walleij wrote: > On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod <vinod.koul@intel.com> wrote: > > > Currently we have two approaches to solve this problem first being the > > DMA_STRIDE_CONFIG proposed by Linus W, I feel this one is better > > approach as this can give client ability to configure each transfer > > rather than set for the channel. Linus W, do you agree? > > I think Sundaram is in the position of doing some heavy work on > using one or the other of the API:s, and I think he is better > suited than anyone else of us to select what scheme to use, > in the end he's going to write the first code using the API. And Unfortunately TI folks don't seem to care about this discussion :( Haven't seen anything on this from them, or on previous RFC by Jassi
2011/8/19 Koul, Vinod <vinod.koul@intel.com>: > On Tue, 2011-08-16 at 15:06 +0200, Linus Walleij wrote: >> On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod <vinod.koul@intel.com> wrote: >> I think Sundaram is in the position of doing some heavy work on >> using one or the other of the API:s, and I think he is better >> suited than anyone else of us to select what scheme to use, >> in the end he's going to write the first code using the API. > And Unfortunately TI folks don't seem to care about this discussion :( > Haven't seen anything on this from them, or on previous RFC by Jassi Well if there is no code usig the API then there is no rush in merging it either I guess. Whenever someone (TI or Samsung) cook some driver patches they can choose their approach. Thanks, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 19 August 2011 19:49, Linus Walleij <linus.ml.walleij@gmail.com> wrote: > 2011/8/19 Koul, Vinod <vinod.koul@intel.com>: >> On Tue, 2011-08-16 at 15:06 +0200, Linus Walleij wrote: >>> On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod <vinod.koul@intel.com> wrote: > >>> I think Sundaram is in the position of doing some heavy work on >>> using one or the other of the API:s, and I think he is better >>> suited than anyone else of us to select what scheme to use, >>> in the end he's going to write the first code using the API. > >> And Unfortunately TI folks don't seem to care about this discussion :( >> Haven't seen anything on this from them, or on previous RFC by Jassi > > Well if there is no code usig the API then there is no rush > in merging it either I guess. Whenever someone (TI or > Samsung) cook some driver patches they can choose their > approach. > No, it's not a matter of "choice". If that were the case, Sundaram already proposed a TI specific flag. Why wait for him to tell his choice again? You might, but I can't molest my sensibility to believe that a Vendor specific flag could be better than a generic solution. Not here at least, where the overhead due to generality is not much. (though I can trim some 'futuristic' members from the 'struct xfer_template') Maintainers might wait as long as they want, but there should never be an option to have vendor specific hacks. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, 2011-08-19 at 21:16 +0530, Jassi Brar wrote: > On 19 August 2011 19:49, Linus Walleij <linus.ml.walleij@gmail.com> wrote: > > 2011/8/19 Koul, Vinod <vinod.koul@intel.com>: > >> On Tue, 2011-08-16 at 15:06 +0200, Linus Walleij wrote: > >>> On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod <vinod.koul@intel.com> wrote: > > > >>> I think Sundaram is in the position of doing some heavy work on > >>> using one or the other of the API:s, and I think he is better > >>> suited than anyone else of us to select what scheme to use, > >>> in the end he's going to write the first code using the API. > > > >> And Unfortunately TI folks don't seem to care about this discussion :( > >> Haven't seen anything on this from them, or on previous RFC by Jassi > > > > Well if there is no code usig the API then there is no rush > > in merging it either I guess. Whenever someone (TI or > > Samsung) cook some driver patches they can choose their > > approach. > > > No, it's not a matter of "choice". > If that were the case, Sundaram already proposed a TI specific > flag. Why wait for him to tell his choice again? > > You might, but I can't molest my sensibility to believe that a Vendor > specific flag could be better than a generic solution. > Not here at least, where the overhead due to generality is not much. > (though I can trim some 'futuristic' members from the 'struct xfer_template') Who said anything about adding a vendor flag solution, since TI are potential users of the API it would good to know i this fits there needs are not. If they don't care, we can't help it... > > Maintainers might wait as long as they want, but there should never > be an option to have vendor specific hacks. to me API looks decent after reading some specs of DMACs which support this mode. Pls send updated patch along with one driver which uses it. Should be good to go...
On Aug 19, 2011, at 9:43 AM, Koul, Vinod wrote: > On Tue, 2011-08-16 at 15:06 +0200, Linus Walleij wrote: >> On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod <vinod.koul@intel.com> wrote: >> >>> Currently we have two approaches to solve this problem first being the >>> DMA_STRIDE_CONFIG proposed by Linus W, I feel this one is better >>> approach as this can give client ability to configure each transfer >>> rather than set for the channel. Linus W, do you agree? >> >> I think Sundaram is in the position of doing some heavy work on >> using one or the other of the API:s, and I think he is better >> suited than anyone else of us to select what scheme to use, >> in the end he's going to write the first code using the API. > And Unfortunately TI folks don't seem to care about this discussion :( > Haven't seen anything on this from them, or on previous RFC by Jassi IIRC, Sundaram went on holiday. I suspect he cares a lot about this discussion as he has a session on the topic at LPC. -Matt -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 8fbf40e..74f3ae0 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -76,6 +76,76 @@ enum dma_transaction_type { /* last transaction type for creation of the capabilities mask */ #define DMA_TX_TYPE_END (DMA_CYCLIC + 1) +/** + * Generic Transfer Request + * ------------------------ + * A chunk is collection of contiguous bytes to be transfered. + * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG). + * ICGs may or maynot change between chunks. + * A FRAME is the smallest series of contiguous {chunk,icg} pairs, + * that when repeated an integral number of times, specifies the transfer. + * A transfer template is specification of a Frame, the number of times + * it is to be repeated and other per-transfer attributes. + * + * Practically, a client driver would have ready a template for each + * type of transfer it is going to need during its lifetime and + * set only 'src_start' and 'dst_start' before submitting the requests. + * + * + * | Frame-1 | Frame-2 | ~ | Frame-'numf' | + * |====....==.===...=...|====....==.===...=...| ~ |====....==.===...=...| + * + * == Chunk size + * ... ICG + */ + +/** + * struct data_chunk - Element of scatter-gather list that makes a frame. + * @size: Number of bytes to read from source. + * size_dst := fn(op, size_src), so doesn't mean much for destination. + * @icg: Number of bytes to jump after last src/dst address of this + * chunk and before first src/dst address for next chunk. + * Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false. + * Ignored for src(assumed 0), if src_inc is true and src_sgl is false. + */ +struct data_chunk { + size_t size; + size_t icg; +}; + +/** + * struct xfer_template - Template to convey DMAC the transfer pattern + * and attributes. + * @op: The operation to perform on source data before writing it on + * to destination address. + * @src_start: Bus address of source for the first chunk. + * @dst_start: Bus address of destination for the first chunk. + * @src_inc: If the source address increments after reading from it. + * @dst_inc: If the destination address increments after writing to it. + * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read). + * Otherwise, source is read contiguously (icg ignored). + * Ignored if src_inc is false. + * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write). + * Otherwise, destination is filled contiguously (icg ignored). + * Ignored if dst_inc is false. + * @frm_irq: If the client expects DMAC driver to do callback after each frame. + * @numf: Number of frames in this template. + * @frame_size: Number of chunks in a frame i.e, size of sgl[]. + * @sgl: Array of {chunk,icg} pairs that make up a frame. + */ +struct xfer_template { + enum dma_transaction_type op; + dma_addr_t src_start; + dma_addr_t dst_start; + bool src_inc; + bool dst_inc; + bool src_sgl; + bool dst_sgl; + bool frm_irq; + size_t numf; + size_t frame_size; + struct data_chunk sgl[0]; +}; /** * enum dma_ctrl_flags - DMA flags to augment operation preparation, @@ -432,6 +502,7 @@ struct dma_tx_state { * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio. * The function takes a buffer of size buf_len. The callback function will * be called after period_len bytes have been transferred. + * @device_prep_dma_genxfer: Transfer expression in a generic way. * @device_control: manipulate all pending operations on a channel, returns * zero or error code * @device_tx_status: poll for transaction completion, the optional @@ -496,6 +567,8 @@ struct dma_device { struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)( struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_data_direction direction); + struct dma_async_tx_descriptor *(*device_prep_dma_genxfer)( + struct dma_chan *chan, struct xfer_template *xt); int (*device_control)(struct dma_chan *chan, enum dma_ctrl_cmd cmd, unsigned long arg);
Define a new api that could be used for doing fancy data transfers like interleaved to contiguous copy and vice-versa. Traditional SG_list based transfers tend to be very inefficient in such cases as where the interleave and chunk are only a few bytes, which call for a very condensed api to convey pattern of the transfer. This api supports all 4 variants of scatter-gather and contiguous transfer. Besides, it could also represent common operations like device_prep_dma_{cyclic, memset, memcpy} and maybe some more that I am not sure of. Of course, neither can this api help transfers that don't lend to DMA by nature, i.e, scattered tiny read/writes with no periodic pattern. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> --- include/linux/dmaengine.h | 73 +++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 73 insertions(+), 0 deletions(-)