Message ID | 20200812140217.24251-7-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | r8a774e1 add support for DU, HDMI and LVDS | expand |
Hi Prabhakar, Thank you for the patch. On Wed, Aug 12, 2020 at 03:02:14PM +0100, Lad Prabhakar wrote: > From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > > Populate HDMI node properties in R8A774E1 SoC dtsi. > > Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi > index 4b57c1ea762c..79efcd73cc46 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi > @@ -2601,22 +2601,32 @@ > }; > > hdmi0: hdmi@fead0000 { > + compatible = "renesas,r8a774e1-hdmi", > + "renesas,rcar-gen3-hdmi"; > reg = <0 0xfead0000 0 0x10000>; > + interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 729>, > + <&cpg CPG_CORE R8A774E1_CLK_HDMI>; > + clock-names = "iahb", "isfr"; > + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; > + resets = <&cpg 729>; > status = "disabled"; > > - /* placeholder */ > - > ports { > #address-cells = <1>; > #size-cells = <0>; > > port@0 { > reg = <0>; > + dw_hdmi0_in: endpoint { > + remote-endpoint = <&du_out_hdmi0>; > + }; > }; > port@1 { > reg = <1>; > }; > port@2 { > + /* HDMI sound */ > reg = <2>; > }; > }; > @@ -2650,6 +2660,7 @@ > port@1 { > reg = <1>; > du_out_hdmi0: endpoint { > + remote-endpoint = <&dw_hdmi0_in>; > }; > }; > port@2 {
On Wed, Aug 12, 2020 at 4:03 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > > Populate HDMI node properties in R8A774E1 SoC dtsi. > > Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.10 (after resolving the port numbering). Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi index 4b57c1ea762c..79efcd73cc46 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi @@ -2601,22 +2601,32 @@ }; hdmi0: hdmi@fead0000 { + compatible = "renesas,r8a774e1-hdmi", + "renesas,rcar-gen3-hdmi"; reg = <0 0xfead0000 0 0x10000>; + interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 729>, + <&cpg CPG_CORE R8A774E1_CLK_HDMI>; + clock-names = "iahb", "isfr"; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 729>; status = "disabled"; - /* placeholder */ - ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; + dw_hdmi0_in: endpoint { + remote-endpoint = <&du_out_hdmi0>; + }; }; port@1 { reg = <1>; }; port@2 { + /* HDMI sound */ reg = <2>; }; }; @@ -2650,6 +2660,7 @@ port@1 { reg = <1>; du_out_hdmi0: endpoint { + remote-endpoint = <&dw_hdmi0_in>; }; }; port@2 {