Message ID | 20200817181655.3716509-2-jmattson@google.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/2] kvm: x86: Toggling CR4.PKE does not load PDPTEs in PAE mode | expand |
On 17/08/20 20:16, Jim Mattson wrote: > See the SDM, volume 3, section 4.4.1: > > If PAE paging would be in use following an execution of MOV to CR0 or > MOV to CR4 (see Section 4.1.1) and the instruction is modifying any of > CR0.CD, CR0.NW, CR0.PG, CR4.PAE, CR4.PGE, CR4.PSE, or CR4.SMEP; then > the PDPTEs are loaded from the address in CR3. > > Fixes: 0be0226f07d14 ("KVM: MMU: fix SMAP virtualization") > Cc: Xiao Guangrong <guangrong.xiao@linux.intel.com> > Signed-off-by: Jim Mattson <jmattson@google.com> > Reviewed-by: Peter Shier <pshier@google.com> > Reviewed-by: Oliver Upton <oupton@google.com> > --- > arch/x86/kvm/x86.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 9e427f14e77f..d8f827063c9c 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -975,7 +975,7 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) > { > unsigned long old_cr4 = kvm_read_cr4(vcpu); > unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | > - X86_CR4_SMEP | X86_CR4_SMAP; > + X86_CR4_SMEP; > > if (kvm_valid_cr4(vcpu, cr4)) > return 1; > Queued both, thanks. Paolo
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 9e427f14e77f..d8f827063c9c 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -975,7 +975,7 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) { unsigned long old_cr4 = kvm_read_cr4(vcpu); unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | - X86_CR4_SMEP | X86_CR4_SMAP; + X86_CR4_SMEP; if (kvm_valid_cr4(vcpu, cr4)) return 1;