diff mbox series

[1/8] dt-bindings: pinctrl: Add bindings for Toshiba Visconti TMPV7700 SoC

Message ID 20200817014632.595898-2-nobuhiro1.iwamatsu@toshiba.co.jp (mailing list archive)
State New, archived
Headers show
Series Add Toshiba Visconti ARM64 Platform support | expand

Commit Message

Nobuhiro Iwamatsu Aug. 17, 2020, 1:46 a.m. UTC 
Add pinctrl bindings for Toshiba Visconti TMPV7700 SoC series.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
 .../pinctrl/toshiba,visconti-pinctrl.yaml     | 82 +++++++++++++++++++
 1 file changed, 82 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml

Comments

Rob Herring (Arm) Aug. 17, 2020, 7:46 p.m. UTC | #1 
On Mon, 17 Aug 2020 10:46:25 +0900, Nobuhiro Iwamatsu wrote:
> Add pinctrl bindings for Toshiba Visconti TMPV7700 SoC series.
> 
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> ---
>  .../pinctrl/toshiba,visconti-pinctrl.yaml     | 82 +++++++++++++++++++
>  1 file changed, 82 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.example.dt.yaml: example-0: pmux@24190000:reg:0: [0, 605618176, 0, 65536] is too long


See https://patchwork.ozlabs.org/patch/1345570

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade

Please check and re-submit.
Rob Herring (Arm) Aug. 17, 2020, 7:48 p.m. UTC | #2 
On Mon, Aug 17, 2020 at 10:46:25AM +0900, Nobuhiro Iwamatsu wrote:
> Add pinctrl bindings for Toshiba Visconti TMPV7700 SoC series.
> 
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> ---
>  .../pinctrl/toshiba,visconti-pinctrl.yaml     | 82 +++++++++++++++++++
>  1 file changed, 82 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml
> new file mode 100644
> index 000000000000..4009902cd396
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/toshiba,visconti-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Toshiba Visconti TMPV770x pin mux/config controller
> +
> +maintainers:
> +  - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> +
> +description:
> +  Toshiba's Visconti ARM SoC a pin mux/config controller.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - toshiba,tmpv7708-pinctrl
> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +patternProperties:
> +  '^.*$':

For new bindings, please define something like '-pins$' for the pin 
nodes.

> +    if:
> +      type: object
> +    then:

Then we don't have to do this if/then.

This also needs a $ref to the common pinctrl schemas.

> +      properties:
> +        function:
> +          description:
> +            Function to mux.
> +          $ref: "/schemas/types.yaml#/definitions/string"
> +          enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i2c5, i2c6, i2c7, i2c8,
> +            spi0, spi1, spi2, spi3, spi4, spi5, spi6,
> +            uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in]
> +
> +        groups:
> +          description:
> +            Name of the pin group to use for the functions.
> +          $ref: "/schemas/types.yaml#/definitions/string"
> +          enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp,
> +            i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp,
> +            spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp,
> +            spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp,
> +            uart0_grp, uart1_grp, uart2_grp, uart3_grp,
> +            pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp,
> +            pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp,
> +            pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp,
> +            pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp,
> +            pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp,
> +            pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp]
> +
> +        drive-strength:
> +          enum: [2, 4, 6, 8, 16, 24, 32]
> +          default: 2
> +          description:
> +            Selects the drive strength for the specified pins, in mA.
> +
> +        bias-pull-up: true
> +
> +        bias-pull-down: true
> +
> +        bias-disable: true
> +
> +additionalProperties: false
> +
> +examples:
> +  # Pinmux controller node
> +  - |
> +    pmux: pmux@24190000 {
> +        compatible = "toshiba,tmpv7708-pinctrl";
> +        reg = <0 0x24190000 0 0x10000>;
> +
> +        spi_0: spi_0 {
> +                function = "spi0";
> +                groups = "spi0_grp";
> +        };
> +    };
> -- 
> 2.27.0
>
Nobuhiro Iwamatsu Aug. 19, 2020, 5:33 a.m. UTC | #3 
Hi,

Thanks for your review.

On Mon, Aug 17, 2020 at 01:46:27PM -0600, Rob Herring wrote:
> On Mon, 17 Aug 2020 10:46:25 +0900, Nobuhiro Iwamatsu wrote:
> > Add pinctrl bindings for Toshiba Visconti TMPV7700 SoC series.
> > 
> > Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> > ---
> >  .../pinctrl/toshiba,visconti-pinctrl.yaml     | 82 +++++++++++++++++++
> >  1 file changed, 82 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml
> > 
> 
> 
> My bot found errors running 'make dt_binding_check' on your patch:
> 
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.example.dt.yaml: example-0: pmux@24190000:reg:0: [0, 605618176, 0, 65536] is too long
> 
> 
> See https://patchwork.ozlabs.org/patch/1345570
> 
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure dt-schema is up to date:
> 
> pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
> 
> Please check and re-submit.
> 

Thanks, I will fix this.

Best regards,
  Nobuhiro
Nobuhiro Iwamatsu Aug. 19, 2020, 5:35 a.m. UTC | #4 
Hi,

Thanks for your review.

On Mon, Aug 17, 2020 at 01:48:33PM -0600, Rob Herring wrote:
> On Mon, Aug 17, 2020 at 10:46:25AM +0900, Nobuhiro Iwamatsu wrote:
> > Add pinctrl bindings for Toshiba Visconti TMPV7700 SoC series.
> > 
> > Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> > ---
> >  .../pinctrl/toshiba,visconti-pinctrl.yaml     | 82 +++++++++++++++++++
> >  1 file changed, 82 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml
> > new file mode 100644
> > index 000000000000..4009902cd396
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml
> > @@ -0,0 +1,82 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pinctrl/toshiba,visconti-pinctrl.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Toshiba Visconti TMPV770x pin mux/config controller
> > +
> > +maintainers:
> > +  - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> > +
> > +description:
> > +  Toshiba's Visconti ARM SoC a pin mux/config controller.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - toshiba,tmpv7708-pinctrl
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +
> > +patternProperties:
> > +  '^.*$':
> 
> For new bindings, please define something like '-pins$' for the pin 
> nodes.

OK, I will update.

> 
> > +    if:
> > +      type: object
> > +    then:
> 
> Then we don't have to do this if/then.
> 
> This also needs a $ref to the common pinctrl schemas.
> 


OK, I will fix this.

> > +      properties:
> > +        function:
> > +          description:
> > +            Function to mux.
> > +          $ref: "/schemas/types.yaml#/definitions/string"
> > +          enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i2c5, i2c6, i2c7, i2c8,
> > +            spi0, spi1, spi2, spi3, spi4, spi5, spi6,
> > +            uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in]
> > +

Best regards,
  Nobuhiro
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml
new file mode 100644
index 000000000000..4009902cd396
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml
@@ -0,0 +1,82 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/toshiba,visconti-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba Visconti TMPV770x pin mux/config controller
+
+maintainers:
+  - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+
+description:
+  Toshiba's Visconti ARM SoC a pin mux/config controller.
+
+properties:
+  compatible:
+    enum:
+      - toshiba,tmpv7708-pinctrl
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+patternProperties:
+  '^.*$':
+    if:
+      type: object
+    then:
+      properties:
+        function:
+          description:
+            Function to mux.
+          $ref: "/schemas/types.yaml#/definitions/string"
+          enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i2c5, i2c6, i2c7, i2c8,
+            spi0, spi1, spi2, spi3, spi4, spi5, spi6,
+            uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in]
+
+        groups:
+          description:
+            Name of the pin group to use for the functions.
+          $ref: "/schemas/types.yaml#/definitions/string"
+          enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp,
+            i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp,
+            spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp,
+            spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp,
+            uart0_grp, uart1_grp, uart2_grp, uart3_grp,
+            pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp,
+            pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp,
+            pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp,
+            pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp,
+            pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp,
+            pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp]
+
+        drive-strength:
+          enum: [2, 4, 6, 8, 16, 24, 32]
+          default: 2
+          description:
+            Selects the drive strength for the specified pins, in mA.
+
+        bias-pull-up: true
+
+        bias-pull-down: true
+
+        bias-disable: true
+
+additionalProperties: false
+
+examples:
+  # Pinmux controller node
+  - |
+    pmux: pmux@24190000 {
+        compatible = "toshiba,tmpv7708-pinctrl";
+        reg = <0 0x24190000 0 0x10000>;
+
+        spi_0: spi_0 {
+                function = "spi0";
+                groups = "spi0_grp";
+        };
+    };