| Message ID | 20200708140836.32418-1-yannick.fertre@st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] drm/bridge/synopsys: dsi: allow LP commands in video mode | expand |
On 7/8/20 4:08 PM, Yannick Fertre wrote: > From: Antonio Borneo <antonio.borneo@st.com> > > Current code only sends LP commands in command mode. > > Allows sending LP commands also in video mode by setting the > proper flag in DSI_VID_MODE_CFG. > > Signed-off-by: Antonio Borneo <antonio.borneo@st.com> > --- > drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > index 1a24ea648ef8..e9a0f42ff99f 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > @@ -89,6 +89,7 @@ > #define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS 0x1 > #define VID_MODE_TYPE_BURST 0x2 > #define VID_MODE_TYPE_MASK 0x3 > +#define ENABLE_LOW_POWER_CMD BIT(15) > #define VID_MODE_VPG_ENABLE BIT(16) > #define VID_MODE_VPG_HORIZONTAL BIT(24) > > @@ -376,6 +377,13 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, > > dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); > dsi_write(dsi, DSI_CMD_MODE_CFG, val); > + > + val = dsi_read(dsi, DSI_VID_MODE_CFG); > + if (lpm) > + val |= ENABLE_LOW_POWER_CMD; > + else > + val &= ~ENABLE_LOW_POWER_CMD; > + dsi_write(dsi, DSI_VID_MODE_CFG, val); > } > > static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val) > (+ Antonio) Hi Yannick & Antonio, Reviewed-by: Philippe Cornu <philippe.cornu@st.com> Tested-by: Philippe Cornu <philippe.cornu@st.com> (Tested with the 3 patches named drm/bridge/synopsys: dsi: allow LP commands in video mode drm/bridge/synopsys: dsi: allow sending longer LP commands drm/bridge/synopsys: dsi: add support for non-continuous HS clock on various dsi bridges + stm32mp157 disco board) Many thanks Philippe :-)
On 08/07/2020 16:08, Yannick Fertre wrote: > From: Antonio Borneo <antonio.borneo@st.com> > > Current code only sends LP commands in command mode. > > Allows sending LP commands also in video mode by setting the > proper flag in DSI_VID_MODE_CFG. > > Signed-off-by: Antonio Borneo <antonio.borneo@st.com> > --- > drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > index 1a24ea648ef8..e9a0f42ff99f 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > @@ -89,6 +89,7 @@ > #define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS 0x1 > #define VID_MODE_TYPE_BURST 0x2 > #define VID_MODE_TYPE_MASK 0x3 > +#define ENABLE_LOW_POWER_CMD BIT(15) > #define VID_MODE_VPG_ENABLE BIT(16) > #define VID_MODE_VPG_HORIZONTAL BIT(24) > > @@ -376,6 +377,13 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, > > dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); > dsi_write(dsi, DSI_CMD_MODE_CFG, val); > + > + val = dsi_read(dsi, DSI_VID_MODE_CFG); > + if (lpm) > + val |= ENABLE_LOW_POWER_CMD; > + else > + val &= ~ENABLE_LOW_POWER_CMD; > + dsi_write(dsi, DSI_VID_MODE_CFG, val); > } > > static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val) > Tested on Amlogic AXG (v1.21a) Acked-by: Neil Armstrong <narmstrong@baylibre.com> Applying to drm-misc-next Thanks ! Neil
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index 1a24ea648ef8..e9a0f42ff99f 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c @@ -89,6 +89,7 @@ #define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS 0x1 #define VID_MODE_TYPE_BURST 0x2 #define VID_MODE_TYPE_MASK 0x3 +#define ENABLE_LOW_POWER_CMD BIT(15) #define VID_MODE_VPG_ENABLE BIT(16) #define VID_MODE_VPG_HORIZONTAL BIT(24) @@ -376,6 +377,13 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); dsi_write(dsi, DSI_CMD_MODE_CFG, val); + + val = dsi_read(dsi, DSI_VID_MODE_CFG); + if (lpm) + val |= ENABLE_LOW_POWER_CMD; + else + val &= ~ENABLE_LOW_POWER_CMD; + dsi_write(dsi, DSI_VID_MODE_CFG, val); } static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val)