diff mbox series

[4/5] arm64: dts: meson-axg: add USB nodes

Message ID 20200909160409.8678-5-narmstrong@baylibre.com (mailing list archive)
State Superseded
Headers show
Series usb: dwc-meson-g12a: Add support for USB on S400 board | expand

Commit Message

Neil Armstrong Sept. 9, 2020, 4:04 p.m. UTC
This adds the USB Glue node, with the USB2 & USB3 controllers along the single
USB2 PHY node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 51 ++++++++++++++++++++++
 1 file changed, 51 insertions(+)

Comments

Martin Blumenstingl Sept. 15, 2020, 8:04 p.m. UTC | #1
Hi Neil,

On Wed, Sep 9, 2020 at 6:05 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> This adds the USB Glue node, with the USB2 & USB3 controllers along the single
> USB2 PHY node.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

[...]
> +                       usb2_phy1: phy@9020 {
> +                               compatible = "amlogic,meson-gxl-usb2-phy";
> +                               #phy-cells = <0>;
> +                               reg = <0x0 0x9020 0x0 0x20>;
> +                               clocks = <&clkc CLKID_USB>;
> +                               clock-names = "phy";
> +                               resets = <&reset RESET_USB_OTG>;
> +                               reset-names = "phy";
> +                               status = "okay";
if you have to re-send this for some reason: status = "okay" is the
default and so I think we can omit this
Neil Armstrong Sept. 16, 2020, 7:10 a.m. UTC | #2
On 15/09/2020 22:04, Martin Blumenstingl wrote:
> Hi Neil,
> 
> On Wed, Sep 9, 2020 at 6:05 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>>
>> This adds the USB Glue node, with the USB2 & USB3 controllers along the single
>> USB2 PHY node.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> 
> [...]
>> +                       usb2_phy1: phy@9020 {
>> +                               compatible = "amlogic,meson-gxl-usb2-phy";
>> +                               #phy-cells = <0>;
>> +                               reg = <0x0 0x9020 0x0 0x20>;
>> +                               clocks = <&clkc CLKID_USB>;
>> +                               clock-names = "phy";
>> +                               resets = <&reset RESET_USB_OTG>;
>> +                               reset-names = "phy";
>> +                               status = "okay";
> if you have to re-send this for some reason: status = "okay" is the
> default and so I think we can omit this
> 
Ok, will removed in v2

Thanks,
Neil
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 9ae6db16b8e6..0b68a383b60f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -171,6 +171,46 @@ 
 		#size-cells = <2>;
 		ranges;
 
+		usb: usb@ffe09080 {
+			compatible = "amlogic,meson-axg-usb-ctrl";
+			reg = <0x0 0xffe09080 0x0 0x20>;
+			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+
+			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
+			clock-names = "usb_ctrl", "ddr";
+			resets = <&reset RESET_USB_OTG>;
+
+			dr_mode = "otg";
+
+			phys = <&usb2_phy1>;
+			phy-names = "usb2-phy1";
+
+			dwc2: usb@ff400000 {
+				compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
+				reg = <0x0 0xff400000 0x0 0x40000>;
+				interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clkc CLKID_USB1>;
+				clock-names = "otg";
+				phys = <&usb2_phy1>;
+				dr_mode = "peripheral";
+				g-rx-fifo-size = <192>;
+				g-np-tx-fifo-size = <128>;
+				g-tx-fifo-size = <128 128 16 16 16>;
+			};
+
+			dwc3: usb@ff500000 {
+				compatible = "snps,dwc3";
+				reg = <0x0 0xff500000 0x0 0x100000>;
+				interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+				dr_mode = "host";
+				maximum-speed = "high-speed";
+				snps,dis_u2_susphy_quirk;
+			};
+		};
+
 		ethmac: ethernet@ff3f0000 {
 			compatible = "amlogic,meson-axg-dwmac",
 				     "snps,dwmac-3.70a",
@@ -1734,6 +1774,17 @@ 
 				clock-names = "core", "clkin0", "clkin1";
 				resets = <&reset RESET_SD_EMMC_C>;
 			};
+
+			usb2_phy1: phy@9020 {
+				compatible = "amlogic,meson-gxl-usb2-phy";
+				#phy-cells = <0>;
+				reg = <0x0 0x9020 0x0 0x20>;
+				clocks = <&clkc CLKID_USB>;
+				clock-names = "phy";
+				resets = <&reset RESET_USB_OTG>;
+				reset-names = "phy";
+				status = "okay";
+			};
 		};
 
 		sram: sram@fffc0000 {