diff mbox series

dmaengine: ti: k3-udma-glue: fix channel enable functions

Message ID 20200915164149.22123-1-grygorii.strashko@ti.com (mailing list archive)
State Superseded
Headers show
Series dmaengine: ti: k3-udma-glue: fix channel enable functions | expand

Commit Message

Grygorii Strashko Sept. 15, 2020, 4:41 p.m. UTC 
Now the K3 UDMA glue layer enable functions perform RMW operation on UDMA
RX/TX RT_CTL registers to set EN bit and enable channel, which is
incorrect, because only EN bit has to be set in those registers to enable
channel (all other bits should be cleared 0).
More over, this causes issues when bootloader leaves UDMA channel RX/TX
RT_CTL registers in incorrect state - TDOWN bit set, for example. As
result, UDMA channel will just perform teardown right after it's enabled.

Hence, fix it by writing correct values (EN=1) directly in UDMA channel
RX/TX RT_CTL registers in k3_udma_glue_enable_tx/rx_chn() functions.

Fixes: d70241913413 ("dmaengine: ti: k3-udma: Add glue layer for non DMAengine users")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
---
 drivers/dma/ti/k3-udma-glue.c | 15 +++------------
 1 file changed, 3 insertions(+), 12 deletions(-)

Comments

Peter Ujfalusi Sept. 16, 2020, 8:35 a.m. UTC | #1 
On 15/09/2020 19.41, Grygorii Strashko wrote:
> Now the K3 UDMA glue layer enable functions perform RMW operation on UDMA
> RX/TX RT_CTL registers to set EN bit and enable channel, which is
> incorrect, because only EN bit has to be set in those registers to enable
> channel (all other bits should be cleared 0).
> More over, this causes issues when bootloader leaves UDMA channel RX/TX
> RT_CTL registers in incorrect state - TDOWN bit set, for example. As
> result, UDMA channel will just perform teardown right after it's enabled.
> 
> Hence, fix it by writing correct values (EN=1) directly in UDMA channel
> RX/TX RT_CTL registers in k3_udma_glue_enable_tx/rx_chn() functions.

This is how the DMAengine driver deals with the enable.

Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>

> Fixes: d70241913413 ("dmaengine: ti: k3-udma: Add glue layer for non DMAengine users")
> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
> ---
>  drivers/dma/ti/k3-udma-glue.c | 15 +++------------
>  1 file changed, 3 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/dma/ti/k3-udma-glue.c b/drivers/dma/ti/k3-udma-glue.c
> index dc03880f021a..37d706cf3ba9 100644
> --- a/drivers/dma/ti/k3-udma-glue.c
> +++ b/drivers/dma/ti/k3-udma-glue.c
> @@ -370,7 +370,6 @@ EXPORT_SYMBOL_GPL(k3_udma_glue_pop_tx_chn);
>  
>  int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn)
>  {
> -	u32 txrt_ctl;
>  	int ret;
>  
>  	ret = xudma_navss_psil_pair(tx_chn->common.udmax,
> @@ -383,15 +382,11 @@ int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn)
>  
>  	tx_chn->psil_paired = true;
>  
> -	txrt_ctl = UDMA_PEER_RT_EN_ENABLE;
>  	xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_PEER_RT_EN_REG,
> -			    txrt_ctl);
> +			    UDMA_PEER_RT_EN_ENABLE);
>  
> -	txrt_ctl = xudma_tchanrt_read(tx_chn->udma_tchanx,
> -				      UDMA_CHAN_RT_CTL_REG);
> -	txrt_ctl |= UDMA_CHAN_RT_CTL_EN;
>  	xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_CTL_REG,
> -			    txrt_ctl);
> +			    UDMA_CHAN_RT_CTL_EN);
>  
>  	k3_udma_glue_dump_tx_rt_chn(tx_chn, "txchn en");
>  	return 0;
> @@ -1059,7 +1054,6 @@ EXPORT_SYMBOL_GPL(k3_udma_glue_rx_flow_disable);
>  
>  int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn)
>  {
> -	u32 rxrt_ctl;
>  	int ret;
>  
>  	if (rx_chn->remote)
> @@ -1078,11 +1072,8 @@ int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn)
>  
>  	rx_chn->psil_paired = true;
>  
> -	rxrt_ctl = xudma_rchanrt_read(rx_chn->udma_rchanx,
> -				      UDMA_CHAN_RT_CTL_REG);
> -	rxrt_ctl |= UDMA_CHAN_RT_CTL_EN;
>  	xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CTL_REG,
> -			    rxrt_ctl);
> +			    UDMA_CHAN_RT_CTL_EN);
>  
>  	xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_PEER_RT_EN_REG,
>  			    UDMA_PEER_RT_EN_ENABLE);
> 

- Péter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Grygorii Strashko Sept. 16, 2020, 8:37 a.m. UTC | #2 
On 16/09/2020 11:35, Peter Ujfalusi wrote:
> 
> 
> On 15/09/2020 19.41, Grygorii Strashko wrote:
>> Now the K3 UDMA glue layer enable functions perform RMW operation on UDMA
>> RX/TX RT_CTL registers to set EN bit and enable channel, which is
>> incorrect, because only EN bit has to be set in those registers to enable
>> channel (all other bits should be cleared 0).
>> More over, this causes issues when bootloader leaves UDMA channel RX/TX
>> RT_CTL registers in incorrect state - TDOWN bit set, for example. As
>> result, UDMA channel will just perform teardown right after it's enabled.
>>
>> Hence, fix it by writing correct values (EN=1) directly in UDMA channel
>> RX/TX RT_CTL registers in k3_udma_glue_enable_tx/rx_chn() functions.
> 
> This is how the DMAengine driver deals with the enable.
> 
> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>

Sorry, but I'd need to resend v2 - based on wrong tree.
Worked too late yesterday :(

> 
>> Fixes: d70241913413 ("dmaengine: ti: k3-udma: Add glue layer for non DMAengine users")
>> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
>> ---
>>   drivers/dma/ti/k3-udma-glue.c | 15 +++------------
>>   1 file changed, 3 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/dma/ti/k3-udma-glue.c b/drivers/dma/ti/k3-udma-glue.c
>> index dc03880f021a..37d706cf3ba9 100644
>> --- a/drivers/dma/ti/k3-udma-glue.c
>> +++ b/drivers/dma/ti/k3-udma-glue.c
>> @@ -370,7 +370,6 @@ EXPORT_SYMBOL_GPL(k3_udma_glue_pop_tx_chn);
>>   
>>   int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn)
>>   {
>> -	u32 txrt_ctl;
>>   	int ret;
>>   
>>   	ret = xudma_navss_psil_pair(tx_chn->common.udmax,
>> @@ -383,15 +382,11 @@ int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn)
>>   
>>   	tx_chn->psil_paired = true;
>>   
>> -	txrt_ctl = UDMA_PEER_RT_EN_ENABLE;
>>   	xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_PEER_RT_EN_REG,
>> -			    txrt_ctl);
>> +			    UDMA_PEER_RT_EN_ENABLE);
>>   
>> -	txrt_ctl = xudma_tchanrt_read(tx_chn->udma_tchanx,
>> -				      UDMA_CHAN_RT_CTL_REG);
>> -	txrt_ctl |= UDMA_CHAN_RT_CTL_EN;
>>   	xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_CTL_REG,
>> -			    txrt_ctl);
>> +			    UDMA_CHAN_RT_CTL_EN);
>>   
>>   	k3_udma_glue_dump_tx_rt_chn(tx_chn, "txchn en");
>>   	return 0;
>> @@ -1059,7 +1054,6 @@ EXPORT_SYMBOL_GPL(k3_udma_glue_rx_flow_disable);
>>   
>>   int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn)
>>   {
>> -	u32 rxrt_ctl;
>>   	int ret;
>>   
>>   	if (rx_chn->remote)
>> @@ -1078,11 +1072,8 @@ int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn)
>>   
>>   	rx_chn->psil_paired = true;
>>   
>> -	rxrt_ctl = xudma_rchanrt_read(rx_chn->udma_rchanx,
>> -				      UDMA_CHAN_RT_CTL_REG);
>> -	rxrt_ctl |= UDMA_CHAN_RT_CTL_EN;
>>   	xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CTL_REG,
>> -			    rxrt_ctl);
>> +			    UDMA_CHAN_RT_CTL_EN);
>>   
>>   	xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_PEER_RT_EN_REG,
>>   			    UDMA_PEER_RT_EN_ENABLE);
>>
> 
> - Péter
> 
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
>
diff mbox series

Patch

diff --git a/drivers/dma/ti/k3-udma-glue.c b/drivers/dma/ti/k3-udma-glue.c
index dc03880f021a..37d706cf3ba9 100644
--- a/drivers/dma/ti/k3-udma-glue.c
+++ b/drivers/dma/ti/k3-udma-glue.c
@@ -370,7 +370,6 @@  EXPORT_SYMBOL_GPL(k3_udma_glue_pop_tx_chn);
 
 int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn)
 {
-	u32 txrt_ctl;
 	int ret;
 
 	ret = xudma_navss_psil_pair(tx_chn->common.udmax,
@@ -383,15 +382,11 @@  int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn)
 
 	tx_chn->psil_paired = true;
 
-	txrt_ctl = UDMA_PEER_RT_EN_ENABLE;
 	xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_PEER_RT_EN_REG,
-			    txrt_ctl);
+			    UDMA_PEER_RT_EN_ENABLE);
 
-	txrt_ctl = xudma_tchanrt_read(tx_chn->udma_tchanx,
-				      UDMA_CHAN_RT_CTL_REG);
-	txrt_ctl |= UDMA_CHAN_RT_CTL_EN;
 	xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_CTL_REG,
-			    txrt_ctl);
+			    UDMA_CHAN_RT_CTL_EN);
 
 	k3_udma_glue_dump_tx_rt_chn(tx_chn, "txchn en");
 	return 0;
@@ -1059,7 +1054,6 @@  EXPORT_SYMBOL_GPL(k3_udma_glue_rx_flow_disable);
 
 int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn)
 {
-	u32 rxrt_ctl;
 	int ret;
 
 	if (rx_chn->remote)
@@ -1078,11 +1072,8 @@  int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn)
 
 	rx_chn->psil_paired = true;
 
-	rxrt_ctl = xudma_rchanrt_read(rx_chn->udma_rchanx,
-				      UDMA_CHAN_RT_CTL_REG);
-	rxrt_ctl |= UDMA_CHAN_RT_CTL_EN;
 	xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CTL_REG,
-			    rxrt_ctl);
+			    UDMA_CHAN_RT_CTL_EN);
 
 	xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_PEER_RT_EN_REG,
 			    UDMA_PEER_RT_EN_ENABLE);