diff mbox series

[V7,2/3] MIPS: Loongson-3: Enable COP2 usage in kernel

Message ID 1600679548-29154-2-git-send-email-chenhc@lemote.com (mailing list archive)
State Accepted
Commit 195615ecc8309082a524433cf552eda722b26c1c
Headers show
Series [V7,1/3] MIPS: context switch: Use save/restore instead of set/clear for Status.CU2 | expand

Commit Message

Huacai Chen Sept. 21, 2020, 9:12 a.m. UTC
Loongson-3's COP2 is Multi-Media coprocessor, it is disabled in kernel
mode by default. However, gslq/gssq (16-bytes load/store instructions)
overrides the instruction format of lwc2/swc2. If we wan't to use gslq/
gssq for optimization in kernel, we should enable COP2 usage in kernel.

Please pay attention that in this patch we only enable COP2 in kernel,
which means it will lose ST0_CU2 when a process go to user space (try
to use COP2 in user space will trigger an exception and then grab COP2,
which is similar to FPU). And as a result, we need to modify the context
switching code because the new scheduled process doesn't contain ST0_CU2
in its THERAD_STATUS probably.

For zboot, we disable gslq/gssq be generated by toolchain.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
V3: Stop using ST0_MM and use ST0_CU2 instead (Thank Thomas and Maciej).
V4: Adopt Thomas's suggestion to improve coding style.
V5: Use ST0_KERNEL_CUMASK in all possible places to avoid #ifdefs.
V6: Modify switch_to() and don't touch r4k_switch.S.
V7: For zboot, disable gslq/gssq be generated by toolchain.

 arch/mips/boot/compressed/Makefile | 5 +++++
 arch/mips/include/asm/mipsregs.h   | 7 +++++++
 arch/mips/include/asm/stackframe.h | 6 +++---
 arch/mips/kernel/head.S            | 2 +-
 arch/mips/kernel/process.c         | 4 ++--
 arch/mips/kernel/traps.c           | 2 +-
 6 files changed, 19 insertions(+), 7 deletions(-)

Comments

Thomas Bogendoerfer Sept. 21, 2020, 12:15 p.m. UTC | #1
On Mon, Sep 21, 2020 at 05:12:27PM +0800, Huacai Chen wrote:
> Loongson-3's COP2 is Multi-Media coprocessor, it is disabled in kernel
> mode by default. However, gslq/gssq (16-bytes load/store instructions)
> overrides the instruction format of lwc2/swc2. If we wan't to use gslq/
> gssq for optimization in kernel, we should enable COP2 usage in kernel.
> 
> Please pay attention that in this patch we only enable COP2 in kernel,
> which means it will lose ST0_CU2 when a process go to user space (try
> to use COP2 in user space will trigger an exception and then grab COP2,
> which is similar to FPU). And as a result, we need to modify the context
> switching code because the new scheduled process doesn't contain ST0_CU2
> in its THERAD_STATUS probably.
> 
> For zboot, we disable gslq/gssq be generated by toolchain.
> 
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
> V3: Stop using ST0_MM and use ST0_CU2 instead (Thank Thomas and Maciej).
> V4: Adopt Thomas's suggestion to improve coding style.
> V5: Use ST0_KERNEL_CUMASK in all possible places to avoid #ifdefs.
> V6: Modify switch_to() and don't touch r4k_switch.S.
> V7: For zboot, disable gslq/gssq be generated by toolchain.
> 
>  arch/mips/boot/compressed/Makefile | 5 +++++
>  arch/mips/include/asm/mipsregs.h   | 7 +++++++
>  arch/mips/include/asm/stackframe.h | 6 +++---
>  arch/mips/kernel/head.S            | 2 +-
>  arch/mips/kernel/process.c         | 4 ++--
>  arch/mips/kernel/traps.c           | 2 +-
>  6 files changed, 19 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile
> index 9a9ba77..2c491c1 100644
> --- a/arch/mips/boot/compressed/Makefile
> +++ b/arch/mips/boot/compressed/Makefile
> @@ -22,6 +22,11 @@ KBUILD_CFLAGS := $(filter-out -pg, $(KBUILD_CFLAGS))
>  
>  KBUILD_CFLAGS := $(filter-out -fstack-protector, $(KBUILD_CFLAGS))
>  
> +# Disable lq/sq in zboot
> +ifdef CONFIG_CPU_LOONGSON64
> +KBUILD_CFLAGS := $(filter-out -march=loongson3a, $(KBUILD_CFLAGS)) -march=mips64r2
> +endif
> +

thanks for doing this, I'm going to apply this later.

This remind of another question, what about loongson2ef ? I'm getting
kbuild failure because of enabled loongson-mmi mails. Are we are missing
something like cflags-y += $(call cc-option,-mno-loongson-mmi) in Platform
file ? Who is taking care of loongson2ef ?

Thomas.
Jiaxun Yang Sept. 23, 2020, 9:44 a.m. UTC | #2
于 2020年9月21日 GMT+08:00 下午8:15:54, Thomas Bogendoerfer <tsbogend@alpha.franken.de> 写到:
>On Mon, Sep 21, 2020 at 05:12:27PM +0800, Huacai Chen wrote:
>> Loongson-3's COP2 is Multi-Media coprocessor, it is disabled in kernel
>> mode by default. However, gslq/gssq (16-bytes load/store instructions)
>> overrides the instruction format of lwc2/swc2. If we wan't to use gslq/
>> gssq for optimization in kernel, we should enable COP2 usage in kernel.
>> 
>> Please pay attention that in this patch we only enable COP2 in kernel,
>> which means it will lose ST0_CU2 when a process go to user space (try
>> to use COP2 in user space will trigger an exception and then grab COP2,
>> which is similar to FPU). And as a result, we need to modify the context
>> switching code because the new scheduled process doesn't contain ST0_CU2
>> in its THERAD_STATUS probably.
>> 
>> For zboot, we disable gslq/gssq be generated by toolchain.
>> 
>> Signed-off-by: Huacai Chen <chenhc@lemote.com>
>> ---
>> V3: Stop using ST0_MM and use ST0_CU2 instead (Thank Thomas and Maciej).
>> V4: Adopt Thomas's suggestion to improve coding style.
>> V5: Use ST0_KERNEL_CUMASK in all possible places to avoid #ifdefs.
>> V6: Modify switch_to() and don't touch r4k_switch.S.
>> V7: For zboot, disable gslq/gssq be generated by toolchain.
>> 
>>  arch/mips/boot/compressed/Makefile | 5 +++++
>>  arch/mips/include/asm/mipsregs.h   | 7 +++++++
>>  arch/mips/include/asm/stackframe.h | 6 +++---
>>  arch/mips/kernel/head.S            | 2 +-
>>  arch/mips/kernel/process.c         | 4 ++--
>>  arch/mips/kernel/traps.c           | 2 +-
>>  6 files changed, 19 insertions(+), 7 deletions(-)
>> 
>> diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile
>> index 9a9ba77..2c491c1 100644
>> --- a/arch/mips/boot/compressed/Makefile
>> +++ b/arch/mips/boot/compressed/Makefile
>> @@ -22,6 +22,11 @@ KBUILD_CFLAGS := $(filter-out -pg, $(KBUILD_CFLAGS))
>>  
>>  KBUILD_CFLAGS := $(filter-out -fstack-protector, $(KBUILD_CFLAGS))
>>  
>> +# Disable lq/sq in zboot
>> +ifdef CONFIG_CPU_LOONGSON64
>> +KBUILD_CFLAGS := $(filter-out -march=loongson3a, $(KBUILD_CFLAGS)) -march=mips64r2
>> +endif
>> +
>
>thanks for doing this, I'm going to apply this later.
>
>This remind of another question, what about loongson2ef ? I'm getting
>kbuild failure because of enabled loongson-mmi mails. Are we are missing
>something like cflags-y += $(call cc-option,-mno-loongson-mmi) in Platform
>file ? Who is taking care of loongson2ef ?

I'll send a patch later. Sorry for the inconvenience.

I'm taking care of it. Just being a little bit busy recently.

Thanks.

- Jiaxun

>
>Thomas.
>
Thomas Bogendoerfer Sept. 24, 2020, 1:53 p.m. UTC | #3
On Wed, Sep 23, 2020 at 05:44:02PM +0800, Jiaxun Yang wrote:
> 于 2020年9月21日 GMT+08:00 下午8:15:54, Thomas Bogendoerfer <tsbogend@alpha.franken.de> 写到:
> >thanks for doing this, I'm going to apply this later.
> >
> >This remind of another question, what about loongson2ef ? I'm getting
> >kbuild failure because of enabled loongson-mmi mails. Are we are missing
> >something like cflags-y += $(call cc-option,-mno-loongson-mmi) in Platform
> >file ? Who is taking care of loongson2ef ?
> 
> I'll send a patch later. Sorry for the inconvenience.

excellent, thank you.

Thomas.
diff mbox series

Patch

diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile
index 9a9ba77..2c491c1 100644
--- a/arch/mips/boot/compressed/Makefile
+++ b/arch/mips/boot/compressed/Makefile
@@ -22,6 +22,11 @@  KBUILD_CFLAGS := $(filter-out -pg, $(KBUILD_CFLAGS))
 
 KBUILD_CFLAGS := $(filter-out -fstack-protector, $(KBUILD_CFLAGS))
 
+# Disable lq/sq in zboot
+ifdef CONFIG_CPU_LOONGSON64
+KBUILD_CFLAGS := $(filter-out -march=loongson3a, $(KBUILD_CFLAGS)) -march=mips64r2
+endif
+
 KBUILD_CFLAGS := $(KBUILD_CFLAGS) -D__KERNEL__ -D__DISABLE_EXPORTS \
 	-DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) -D"VMLINUX_LOAD_ADDRESS_ULL=$(VMLINUX_LOAD_ADDRESS)ull"
 
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 1a03fdc2..36b8433 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -389,6 +389,13 @@ 
 #define ST0_CU3			0x80000000
 #define ST0_XX			0x80000000	/* MIPS IV naming */
 
+/* in-kernel enabled CUs */
+#ifdef CONFIG_CPU_LOONGSON64
+#define ST0_KERNEL_CUMASK      (ST0_CU0 | ST0_CU2)
+#else
+#define ST0_KERNEL_CUMASK      ST0_CU0
+#endif
+
 /*
  * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2)
  */
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index 3e8d2aa..aa430a6 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -450,7 +450,7 @@ 
  */
 		.macro	CLI
 		mfc0	t0, CP0_STATUS
-		li	t1, ST0_CU0 | STATMASK
+		li	t1, ST0_KERNEL_CUMASK | STATMASK
 		or	t0, t1
 		xori	t0, STATMASK
 		mtc0	t0, CP0_STATUS
@@ -463,7 +463,7 @@ 
  */
 		.macro	STI
 		mfc0	t0, CP0_STATUS
-		li	t1, ST0_CU0 | STATMASK
+		li	t1, ST0_KERNEL_CUMASK | STATMASK
 		or	t0, t1
 		xori	t0, STATMASK & ~1
 		mtc0	t0, CP0_STATUS
@@ -477,7 +477,7 @@ 
  */
 		.macro	KMODE
 		mfc0	t0, CP0_STATUS
-		li	t1, ST0_CU0 | (STATMASK & ~1)
+		li	t1, ST0_KERNEL_CUMASK | (STATMASK & ~1)
 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
 		andi	t2, t0, ST0_IEP
 		srl	t2, 2
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 7dd234e..61b7358 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -35,7 +35,7 @@ 
 	.macro	setup_c0_status set clr
 	.set	push
 	mfc0	t0, CP0_STATUS
-	or	t0, ST0_CU0|\set|0x1f|\clr
+	or	t0, ST0_KERNEL_CUMASK|\set|0x1f|\clr
 	xor	t0, 0x1f|\clr
 	mtc0	t0, CP0_STATUS
 	.set	noreorder
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index f5dc316..b36297e 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -68,7 +68,7 @@  void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
 	unsigned long status;
 
 	/* New thread loses kernel privileges. */
-	status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
+	status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_CU2|ST0_FR|KU_MASK);
 	status |= KU_USER;
 	regs->cp0_status = status;
 	lose_fpu(0);
@@ -133,7 +133,7 @@  int copy_thread(unsigned long clone_flags, unsigned long usp,
 	childregs = (struct pt_regs *) childksp - 1;
 	/*  Put the stack after the struct pt_regs.  */
 	childksp = (unsigned long) childregs;
-	p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
+	p->thread.cp0_status = (read_c0_status() & ~(ST0_CU2|ST0_CU1)) | ST0_KERNEL_CUMASK;
 	if (unlikely(p->flags & PF_KTHREAD)) {
 		/* kernel thread */
 		unsigned long status = p->thread.cp0_status;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index cf788591..e035295 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -2204,7 +2204,7 @@  static void configure_status(void)
 	 * flag that some firmware may have left set and the TS bit (for
 	 * IP27).  Set XX for ISA IV code to work.
 	 */
-	unsigned int status_set = ST0_CU0;
+	unsigned int status_set = ST0_KERNEL_CUMASK;
 #ifdef CONFIG_64BIT
 	status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX;
 #endif