[v4,1/4] dt-bindings: usb: dwc3-imx8mp: add imx8mp dwc3 glue bindings

Commit Message

Jun Li Oct. 2, 2020, 4:30 p.m. UTC

NXP imx8mp integrates 2 dwc3 3.30b IP and add some wakeup logic
to support low power mode, the glue layer is for this wakeup
functionality, which has a separated interrupt, can support
wakeup from U3 and connect events for host, and vbus wakeup for
device.

Signed-off-by: Li Jun <[e-mail]>
---
 .../devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml   | 106 +++++++++++++++++++++
 1 file changed, 106 insertions(+)

Comments

Krzysztof Kozlowski Oct. 3, 2020, 10:57 a.m. UTC | #1

On Fri, 2 Oct 2020 at 18:35, Li Jun <[e-mail]> wrote:
>
> NXP imx8mp integrates 2 dwc3 3.30b IP and add some wakeup logic
> to support low power mode, the glue layer is for this wakeup
> functionality, which has a separated interrupt, can support
> wakeup from U3 and connect events for host, and vbus wakeup for
> device.
>
> Signed-off-by: Li Jun <[e-mail]>
> ---
>  .../devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml   | 106 +++++++++++++++++++++
>  1 file changed, 106 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
> new file mode 100644
> index 0000000..c16c94c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
> @@ -0,0 +1,106 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2020 NXP
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP iMX8MP Soc USB Controller
> +
> +maintainers:
> +  - Li Jun <[e-mail]>
> +
> +properties:
> +  compatible:
> +    items:
> +    - const: fsl,imx8mp-dwc3

The same comment as for v3.

Best regards,
Krzysztof

Jun Li Oct. 3, 2020, 12:10 p.m. UTC | #2

> -----Original Message-----
> From: Krzysztof Kozlowski <[e-mail]>
> Sent: Saturday, October 3, 2020 6:57 PM
> To: Jun Li <[e-mail]>
> Cc: [e-mail]; [e-mail]; [e-mail];
> [e-mail]; [e-mail];
> [e-mail]; [e-mail]; [e-mail];
> dl-linux-imx <[e-mail]>; Anson Huang <[e-mail]>;
> Aisheng Dong <[e-mail]>; Peng Fan <[e-mail]>; Andy Duan
> <[e-mail]>; Horia Geanta <[e-mail]>;
> [e-mail]; [e-mail];
> [e-mail]
> Subject: Re: [PATCH v4 1/4] dt-bindings: usb: dwc3-imx8mp: add imx8mp dwc3
> glue bindings
> 
> On Fri, 2 Oct 2020 at 18:35, Li Jun <[e-mail]> wrote:
> >
> > NXP imx8mp integrates 2 dwc3 3.30b IP and add some wakeup logic to
> > support low power mode, the glue layer is for this wakeup
> > functionality, which has a separated interrupt, can support wakeup
> > from U3 and connect events for host, and vbus wakeup for device.
> >
> > Signed-off-by: Li Jun <[e-mail]>
> > ---
> >  .../devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml   | 106
> +++++++++++++++++++++
> >  1 file changed, 106 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
> > b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
> > new file mode 100644
> > index 0000000..c16c94c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
> > @@ -0,0 +1,106 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright
> > +(c) 2020 NXP %YAML 1.2
> > +---
> > +$id:
> >
> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> >
> +cetree.org%2Fschemas%2Fusb%2Ffsl%2Cimx8mp-dwc3.yaml%23&amp;data=02%7C
> >
> +01%7Cjun.li%40nxp.com%7C65dadb86aff34a97750d08d8678b1b8d%7C686ea1d3bc
> >
> +2b4c6fa92cd99c5c301635%7C0%7C0%7C637373194445369560&amp;sdata=yL%2BCJ
> > +XVhWnS2LlnwlF3793dygxPDFJVCZhVQcj8DJDI%3D&amp;reserved=0
> > +$schema:
> >
> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> >
> +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=02%7C01%7Cjun.li%40
> >
> +nxp.com%7C65dadb86aff34a97750d08d8678b1b8d%7C686ea1d3bc2b4c6fa92cd99c
> >
> +5c301635%7C0%7C0%7C637373194445369560&amp;sdata=K2%2FUvKrKEeFf5J4M5dC
> > +L5f%2B7nVBSDPxUopZgwlfeN8I%3D&amp;reserved=0
> > +
> > +title: NXP iMX8MP Soc USB Controller
> > +
> > +maintainers:
> > +  - Li Jun <[e-mail]>
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +    - const: fsl,imx8mp-dwc3
> 
> The same comment as for v3.

Missed this comment, sent out V5 to address this.

Thanks
Li Jun
> 
> Best regards,
> Krzysztof

Patch

diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
new file mode 100644
index 0000000..c16c94c
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
@@ -0,0 +1,106 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 NXP
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP iMX8MP Soc USB Controller
+
+maintainers:
+  - Li Jun <[e-mail]>
+
+properties:
+  compatible:
+    items:
+    - const: fsl,imx8mp-dwc3
+
+  reg:
+    maxItems: 1
+    description: Address and length of the register set for the wrapper of
+      dwc3 core on the SOC.
+
+  "#address-cells":
+    enum: [ 1, 2 ]
+
+  "#size-cells":
+    enum: [ 1, 2 ]
+
+  dma-ranges:
+    description:
+      See section 2.3.9 of the DeviceTree Specification.
+
+  ranges: true
+
+  interrupts:
+    maxItems: 1
+    description: The interrupt that is asserted when a wakeup event is
+      received.
+
+  clocks:
+    description:
+      A list of phandle and clock-specifier pairs for the clocks
+      listed in clock-names.
+    items:
+      - description: system hsio root clock.
+      - description: suspend clock, used for usb wakeup logic.
+
+  clock-names:
+    items:
+      - const: hsio
+      - const: suspend
+
+# Required child node:
+
+patternProperties:
+  "^dwc3@[0-9a-f]+$":
+    type: object
+    description:
+      A child node must exist to represent the core DWC3 IP block
+      The content of the node is defined in dwc3.txt.
+
+required:
+  - compatible
+  - reg
+  - "#address-cells"
+  - "#size-cells"
+  - dma-ranges
+  - ranges
+  - clocks
+  - clock-names
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8mp-clock.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    usb3_0: usb@32f10100 {
+      compatible = "fsl,imx8mp-dwc3";
+      reg = <0x32f10100 0x8>;
+      clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
+               <&clk IMX8MP_CLK_USB_ROOT>;
+      clock-names = "hsio", "suspend";
+      interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+      #address-cells = <1>;
+      #size-cells = <1>;
+      dma-ranges = <0x40000000 0x40000000 0xc0000000>;
+      ranges;
+
+      dwc3@38100000 {
+        compatible = "snps,dwc3";
+        reg = <0x38100000 0x10000>;
+        clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
+                 <&clk IMX8MP_CLK_USB_CORE_REF>,
+                 <&clk IMX8MP_CLK_USB_ROOT>;
+        clock-names = "bus_early", "ref", "suspend";
+        assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
+        assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
+        assigned-clock-rates = <500000000>;
+        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+        phys = <&usb3_phy0>, <&usb3_phy0>;
+        phy-names = "usb2-phy", "usb3-phy";
+        snps,dis-u2-freeclk-exists-quirk;
+      };
+    };