| Message ID | adb5abbd-be50-82ba-c85d-c47024acc47c@suse.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | x86emul: increase FPU save area in test harness/fuzzer | expand |
On 22/10/2020 14:39, Jan Beulich wrote: > Running them on a system (or emulator) with AMX support requires this > to be quite a bit larger than 8k, to avoid triggering the assert() in > emul_test_init(). Bump all the way up to 16k right away. > > Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com> > --- > Intel's Software Development Emulator properly reports XSAVE-related AMX > CPUID data for Sapphire Rapids emulation as of 8.59.0. > > --- a/tools/tests/x86_emulator/x86-emulate.c > +++ b/tools/tests/x86_emulator/x86-emulate.c > @@ -33,7 +33,7 @@ > uint32_t mxcsr_mask = 0x0000ffbf; > struct cpuid_policy cp; > > -static char fpu_save_area[4096] __attribute__((__aligned__((64)))); > +static char fpu_save_area[0x4000] __attribute__((__aligned__((64)))); > static bool use_xsave; > > /*
--- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -33,7 +33,7 @@ uint32_t mxcsr_mask = 0x0000ffbf; struct cpuid_policy cp; -static char fpu_save_area[4096] __attribute__((__aligned__((64)))); +static char fpu_save_area[0x4000] __attribute__((__aligned__((64)))); static bool use_xsave; /*
Running them on a system (or emulator) with AMX support requires this to be quite a bit larger than 8k, to avoid triggering the assert() in emul_test_init(). Bump all the way up to 16k right away. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- Intel's Software Development Emulator properly reports XSAVE-related AMX CPUID data for Sapphire Rapids emulation as of 8.59.0.