Message ID | 20201016204019.2606-4-linux@fw-web.de (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | add available pwm for bananapi-r64 | expand |
On Fri, Oct 16, 2020 at 10:40 PM Frank Wunderlich <linux@fw-web.de> wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > mt7622 is reported by mediatek to have only 6 pwm channels > so drop pindefines for 7th channel > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> I can merge this patch to the pinctrl tree if I get some kind of review response from one of the Mediatek maintainers. The rest should probably go through ARM SoC. Yours, Linus Walleij
> > mt7622 is reported by mediatek to have only 6 pwm channels > > so drop pindefines for 7th channel > > > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > > I can merge this patch to the pinctrl tree if I get some kind of > review response from one of the Mediatek maintainers. > After confirming with the internal team, MT7622 actually does not have the 7th channel. Thanks for Frank's catchup and patch. Acked-by: Sean Wang <sean.wang@kernel.org> > The rest should probably go through ARM SoC. > > Yours, > Linus Walleij
On Fri, Oct 16, 2020 at 10:40 PM Frank Wunderlich <linux@fw-web.de> wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > mt7622 is reported by mediatek to have only 6 pwm channels > so drop pindefines for 7th channel > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> This patch (3/3) applied to the pinctrl tree. Please apply 1-2 to the ARM SoC tree. Yours, Linus Walleij
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7622.c b/drivers/pinctrl/mediatek/pinctrl-mt7622.c index ce4a8a0cc19c..260ffadd24e4 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c @@ -439,12 +439,6 @@ static int mt7622_pwm_ch6_2_pins[] = { 81, }; static int mt7622_pwm_ch6_2_funcs[] = { 4, }; static int mt7622_pwm_ch6_3_pins[] = { 100, }; static int mt7622_pwm_ch6_3_funcs[] = { 0, }; -static int mt7622_pwm_ch7_0_pins[] = { 70, }; -static int mt7622_pwm_ch7_0_funcs[] = { 3, }; -static int mt7622_pwm_ch7_1_pins[] = { 82, }; -static int mt7622_pwm_ch7_1_funcs[] = { 4, }; -static int mt7622_pwm_ch7_2_pins[] = { 101, }; -static int mt7622_pwm_ch7_2_funcs[] = { 0, }; /* SD */ static int mt7622_sd_0_pins[] = { 16, 17, 18, 19, 20, 21, }; @@ -611,9 +605,6 @@ static const struct group_desc mt7622_groups[] = { PINCTRL_PIN_GROUP("pwm_ch6_1", mt7622_pwm_ch6_1), PINCTRL_PIN_GROUP("pwm_ch6_2", mt7622_pwm_ch6_2), PINCTRL_PIN_GROUP("pwm_ch6_3", mt7622_pwm_ch6_3), - PINCTRL_PIN_GROUP("pwm_ch7_0", mt7622_pwm_ch7_0), - PINCTRL_PIN_GROUP("pwm_ch7_1", mt7622_pwm_ch7_1), - PINCTRL_PIN_GROUP("pwm_ch7_2", mt7622_pwm_ch7_2), PINCTRL_PIN_GROUP("sd_0", mt7622_sd_0), PINCTRL_PIN_GROUP("sd_1", mt7622_sd_1), PINCTRL_PIN_GROUP("snfi", mt7622_snfi), @@ -700,9 +691,7 @@ static const char *mt7622_pwm_groups[] = { "pwm_ch1_0", "pwm_ch1_1", "pwm_ch4_3", "pwm_ch5_0", "pwm_ch5_1", "pwm_ch5_2", "pwm_ch6_0", "pwm_ch6_1", - "pwm_ch6_2", "pwm_ch6_3", - "pwm_ch7_0", "pwm_ch7_1", - "pwm_ch7_2", }; + "pwm_ch6_2", "pwm_ch6_3", }; static const char *mt7622_sd_groups[] = { "sd_0", "sd_1", }; static const char *mt7622_spic_groups[] = { "spic0_0", "spic0_1", "spic1_0", "spic1_1", "spic2_0",