| Message ID | 20201111123838.15682-5-yong.wu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MT8192 IOMMU support | expand |
On Wed, Nov 11, 2020 at 08:38:18PM +0800, Yong Wu wrote: > In the latest SoC, there are several HW IP require a sepecial iova > range, mainly CCU and VPU has this requirement. Take CCU as a example, > CCU require its iova locate in the range(0x4000_0000 ~ 0x43ff_ffff). > > In this patch we add a domain definition for the special port. In the > example of CCU, If we preassign CCU port in domain1, then iommu driver > will prepare a independent iommu domain of the special iova range for it, > then the iova got from dma_alloc_attrs(ccu-dev) will locate in its special > range. > > This is a preparing patch for multi-domain support. > > Signed-off-by: Yong Wu <yong.wu@mediatek.com> > --- > include/dt-bindings/memory/mtk-smi-larb-port.h | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof
On Wed, 11 Nov 2020 20:38:18 +0800, Yong Wu wrote: > In the latest SoC, there are several HW IP require a sepecial iova > range, mainly CCU and VPU has this requirement. Take CCU as a example, > CCU require its iova locate in the range(0x4000_0000 ~ 0x43ff_ffff). > > In this patch we add a domain definition for the special port. In the > example of CCU, If we preassign CCU port in domain1, then iommu driver > will prepare a independent iommu domain of the special iova range for it, > then the iova got from dma_alloc_attrs(ccu-dev) will locate in its special > range. > > This is a preparing patch for multi-domain support. > > Signed-off-by: Yong Wu <yong.wu@mediatek.com> > --- > include/dt-bindings/memory/mtk-smi-larb-port.h | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/include/dt-bindings/memory/mtk-smi-larb-port.h b/include/dt-bindings/memory/mtk-smi-larb-port.h index f4d8e3aed0bc..d00f5de8438b 100644 --- a/include/dt-bindings/memory/mtk-smi-larb-port.h +++ b/include/dt-bindings/memory/mtk-smi-larb-port.h @@ -7,9 +7,16 @@ #define __DTS_MTK_IOMMU_PORT_H_ #define MTK_LARB_NR_MAX 32 +#define MTK_M4U_DOM_NR_MAX 8 + +#define MTK_M4U_DOM_ID(domid, larb, port) \ + (((domid) & 0x7) << 16 | (((larb) & 0x1f) << 5) | ((port) & 0x1f)) + +/* The default dom id is 0. */ +#define MTK_M4U_ID(larb, port) MTK_M4U_DOM_ID(0, larb, port) -#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) #define MTK_M4U_TO_LARB(id) (((id) >> 5) & 0x1f) #define MTK_M4U_TO_PORT(id) ((id) & 0x1f) +#define MTK_M4U_TO_DOM(id) (((id) >> 16) & 0x7) #endif
In the latest SoC, there are several HW IP require a sepecial iova range, mainly CCU and VPU has this requirement. Take CCU as a example, CCU require its iova locate in the range(0x4000_0000 ~ 0x43ff_ffff). In this patch we add a domain definition for the special port. In the example of CCU, If we preassign CCU port in domain1, then iommu driver will prepare a independent iommu domain of the special iova range for it, then the iova got from dma_alloc_attrs(ccu-dev) will locate in its special range. This is a preparing patch for multi-domain support. Signed-off-by: Yong Wu <yong.wu@mediatek.com> --- include/dt-bindings/memory/mtk-smi-larb-port.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)