| Message ID | 20201130131047.2648960-9-daniel@0x0f.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: mstar: Add basic support for i2m and SMP | expand |
On Mon, Nov 30, 2020 at 2:10 PM Daniel Palmer <daniel@0x0f.com> wrote: > > +&riu { > + smpctrl@204000 { > + compatible = "mstar,smpctrl"; > + reg = <0x204000 0x200>; > + status = "okay"; > + }; You probably want some more specific compatible value, in case there are multiple SoCs from mstar that have an smpctrl block and they don't all use an exactly identical register layout. Arnd
Hi Arnd, On Mon, 30 Nov 2020 at 22:44, Arnd Bergmann <arnd@kernel.org> wrote: > > On Mon, Nov 30, 2020 at 2:10 PM Daniel Palmer <daniel@0x0f.com> wrote: > > > > +&riu { > > + smpctrl@204000 { > > + compatible = "mstar,smpctrl"; > > + reg = <0x204000 0x200>; > > + status = "okay"; > > + }; > > You probably want some more specific compatible value, in case there are > multiple SoCs from mstar that have an smpctrl block and they don't all use > an exactly identical register layout. > From what I can tell these are in the same place for the infinity2m and the other SMP chip in this series that are in the infinity6 series. Would "mstar,i2m-smpctrl" make more sense? Thanks, Daniel
On Mon, Nov 30, 2020 at 3:11 PM Daniel Palmer <daniel@0x0f.com> wrote: > > Hi Arnd, > > On Mon, 30 Nov 2020 at 22:44, Arnd Bergmann <arnd@kernel.org> wrote: > > > > On Mon, Nov 30, 2020 at 2:10 PM Daniel Palmer <daniel@0x0f.com> wrote: > > > > > > +&riu { > > > + smpctrl@204000 { > > > + compatible = "mstar,smpctrl"; > > > + reg = <0x204000 0x200>; > > > + status = "okay"; > > > + }; > > > > You probably want some more specific compatible value, in case there are > > multiple SoCs from mstar that have an smpctrl block and they don't all use > > an exactly identical register layout. > > From what I can tell these are in the same place for the infinity2m and > the other SMP chip in this series that are in the infinity6 series. > > Would "mstar,i2m-smpctrl" make more sense? Please use the exact name of the chip for the most specific name, plus a generic identifier that makes sense for all of them. For the generic identifier, you can normally just use whatever the oldest chip is that you can find with that IP block. Arnd
diff --git a/arch/arm/boot/dts/mstar-infinity2m.dtsi b/arch/arm/boot/dts/mstar-infinity2m.dtsi index 02adb9fe9d3c..85e178368ba4 100644 --- a/arch/arm/boot/dts/mstar-infinity2m.dtsi +++ b/arch/arm/boot/dts/mstar-infinity2m.dtsi @@ -13,3 +13,11 @@ cpu1: cpu@1 { reg = <0x1>; }; }; + +&riu { + smpctrl@204000 { + compatible = "mstar,smpctrl"; + reg = <0x204000 0x200>; + status = "okay"; + }; +};
Add the smpctrl registers to the infinity2m dtsi so that the second CPU can be enabled on chips in this family. Signed-off-by: Daniel Palmer <daniel@0x0f.com> --- arch/arm/boot/dts/mstar-infinity2m.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)