Message ID | 20201214092048.v5.1.Iec3430c7d3c2a29262695edef7b82a14aaa567e5@changeid (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v5,1/2] mmc: sdhci-msm: Warn about overclocking SD/MMC | expand |
On 14/12/20 7:21 pm, Douglas Anderson wrote: > As talked about in commit 5e4b7e82d497 ("clk: qcom: gcc-sdm845: Use > floor ops for sdcc clks"), most clocks handled by the Qualcomm clock > drivers are rounded _up_ by default instead of down. We should make > sure SD/MMC clocks are always rounded down in the clock drivers. > Let's add a warning in the Qualcomm SDHCI driver to help catch the > problem. > > This would have saved a bunch of time [1]. > > NOTE: this doesn't actually fix any problems, it just makes it obvious > to devs that there is a problem and that should be an indication to > fix the clock driver. > > [1] http://lore.kernel.org/r/20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c7f@changeid > > Suggested-by: Stephen Boyd <swboyd@chromium.org> > Signed-off-by: Douglas Anderson <dianders@chromium.org> > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> > --- > > (no changes since v4) > > Changes in v4: > - Emphasize in the commit message that this itself doesn't fix anything. > > Changes in v3: > - Proper printf format code. > > Changes in v2: > - Store rate in unsigned long, not unsigned int. > - Reuse the clk_get_rate() in the later print. > > drivers/mmc/host/sdhci-msm.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c > index 3451eb325513..50beb407dbe9 100644 > --- a/drivers/mmc/host/sdhci-msm.c > +++ b/drivers/mmc/host/sdhci-msm.c > @@ -353,6 +353,7 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, > struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); > struct mmc_ios curr_ios = host->mmc->ios; > struct clk *core_clk = msm_host->bulk_clks[0].clk; > + unsigned long achieved_rate; > int rc; > > clock = msm_get_clock_rate_for_bus_mode(host, clock); > @@ -363,10 +364,20 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, > curr_ios.timing); > return; > } > + > + /* > + * Qualcomm clock drivers by default round clock _up_ if they can't > + * make the requested rate. This is not good for SD. Yell if we > + * encounter it. > + */ > + achieved_rate = clk_get_rate(core_clk); > + if (achieved_rate > clock) > + pr_warn("%s: Card appears overclocked; req %u Hz, actual %lu Hz\n", > + mmc_hostname(host->mmc), clock, achieved_rate); > + > msm_host->clk_rate = clock; > pr_debug("%s: Setting clock at rate %lu at timing %d\n", > - mmc_hostname(host->mmc), clk_get_rate(core_clk), > - curr_ios.timing); > + mmc_hostname(host->mmc), achieved_rate, curr_ios.timing); > } > > /* Platform specific tuning */ >
Ulf, On Mon, Dec 14, 2020 at 9:23 AM Douglas Anderson <dianders@chromium.org> wrote: > > As talked about in commit 5e4b7e82d497 ("clk: qcom: gcc-sdm845: Use > floor ops for sdcc clks"), most clocks handled by the Qualcomm clock > drivers are rounded _up_ by default instead of down. We should make > sure SD/MMC clocks are always rounded down in the clock drivers. > Let's add a warning in the Qualcomm SDHCI driver to help catch the > problem. > > This would have saved a bunch of time [1]. > > NOTE: this doesn't actually fix any problems, it just makes it obvious > to devs that there is a problem and that should be an indication to > fix the clock driver. > > [1] http://lore.kernel.org/r/20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c7f@changeid > > Suggested-by: Stephen Boyd <swboyd@chromium.org> > Signed-off-by: Douglas Anderson <dianders@chromium.org> > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > > (no changes since v4) > > Changes in v4: > - Emphasize in the commit message that this itself doesn't fix anything. > > Changes in v3: > - Proper printf format code. > > Changes in v2: > - Store rate in unsigned long, not unsigned int. > - Reuse the clk_get_rate() in the later print. > > drivers/mmc/host/sdhci-msm.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) Is there anything you need me to do for this patch and the next one? They are both reviewed / Acked and hopefully have sat around long enough that folks who took a long holiday break had a chance to shout if they were going to, so I think they could land. ;-) Please yell if there's something you need me to do, or feel free to tell me to sit quietly and be patient. Thanks! -Doug
On Mon, 14 Dec 2020 at 18:23, Douglas Anderson <dianders@chromium.org> wrote: > > As talked about in commit 5e4b7e82d497 ("clk: qcom: gcc-sdm845: Use > floor ops for sdcc clks"), most clocks handled by the Qualcomm clock > drivers are rounded _up_ by default instead of down. We should make > sure SD/MMC clocks are always rounded down in the clock drivers. > Let's add a warning in the Qualcomm SDHCI driver to help catch the > problem. > > This would have saved a bunch of time [1]. > > NOTE: this doesn't actually fix any problems, it just makes it obvious > to devs that there is a problem and that should be an indication to > fix the clock driver. > > [1] http://lore.kernel.org/r/20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c7f@changeid > > Suggested-by: Stephen Boyd <swboyd@chromium.org> > Signed-off-by: Douglas Anderson <dianders@chromium.org> > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Applied for next, thanks! Kind regards Uffe > --- > > (no changes since v4) > > Changes in v4: > - Emphasize in the commit message that this itself doesn't fix anything. > > Changes in v3: > - Proper printf format code. > > Changes in v2: > - Store rate in unsigned long, not unsigned int. > - Reuse the clk_get_rate() in the later print. > > drivers/mmc/host/sdhci-msm.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c > index 3451eb325513..50beb407dbe9 100644 > --- a/drivers/mmc/host/sdhci-msm.c > +++ b/drivers/mmc/host/sdhci-msm.c > @@ -353,6 +353,7 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, > struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); > struct mmc_ios curr_ios = host->mmc->ios; > struct clk *core_clk = msm_host->bulk_clks[0].clk; > + unsigned long achieved_rate; > int rc; > > clock = msm_get_clock_rate_for_bus_mode(host, clock); > @@ -363,10 +364,20 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, > curr_ios.timing); > return; > } > + > + /* > + * Qualcomm clock drivers by default round clock _up_ if they can't > + * make the requested rate. This is not good for SD. Yell if we > + * encounter it. > + */ > + achieved_rate = clk_get_rate(core_clk); > + if (achieved_rate > clock) > + pr_warn("%s: Card appears overclocked; req %u Hz, actual %lu Hz\n", > + mmc_hostname(host->mmc), clock, achieved_rate); > + > msm_host->clk_rate = clock; > pr_debug("%s: Setting clock at rate %lu at timing %d\n", > - mmc_hostname(host->mmc), clk_get_rate(core_clk), > - curr_ios.timing); > + mmc_hostname(host->mmc), achieved_rate, curr_ios.timing); > } > > /* Platform specific tuning */ > -- > 2.29.2.576.ga3fc446d84-goog >
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 3451eb325513..50beb407dbe9 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -353,6 +353,7 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); struct mmc_ios curr_ios = host->mmc->ios; struct clk *core_clk = msm_host->bulk_clks[0].clk; + unsigned long achieved_rate; int rc; clock = msm_get_clock_rate_for_bus_mode(host, clock); @@ -363,10 +364,20 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, curr_ios.timing); return; } + + /* + * Qualcomm clock drivers by default round clock _up_ if they can't + * make the requested rate. This is not good for SD. Yell if we + * encounter it. + */ + achieved_rate = clk_get_rate(core_clk); + if (achieved_rate > clock) + pr_warn("%s: Card appears overclocked; req %u Hz, actual %lu Hz\n", + mmc_hostname(host->mmc), clock, achieved_rate); + msm_host->clk_rate = clock; pr_debug("%s: Setting clock at rate %lu at timing %d\n", - mmc_hostname(host->mmc), clk_get_rate(core_clk), - curr_ios.timing); + mmc_hostname(host->mmc), achieved_rate, curr_ios.timing); } /* Platform specific tuning */