| Message ID | 1608183881-18692-4-git-send-email-yilun.xu@intel.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | UIO support for dfl devices | expand |
On 12/16/20 9:44 PM, Xu Yilun wrote: > This patch adds description for UIO support for dfl devices on DFL > bus. Thanks for the changes. Reviewed-by: Tom Rix <trix@redhat.com> > Signed-off-by: Xu Yilun <yilun.xu@intel.com> > --- > v2: no doc in v1, add it for v2. > v3: some documentation fixes. > --- > Documentation/fpga/dfl.rst | 27 +++++++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst > index 0404fe6..b298ad9 100644 > --- a/Documentation/fpga/dfl.rst > +++ b/Documentation/fpga/dfl.rst > @@ -7,6 +7,7 @@ Authors: > - Enno Luebbers <enno.luebbers@intel.com> > - Xiao Guangrong <guangrong.xiao@linux.intel.com> > - Wu Hao <hao.wu@intel.com> > +- Xu Yilun <yilun.xu@intel.com> > > The Device Feature List (DFL) FPGA framework (and drivers according to > this framework) hides the very details of low layer hardwares and provides > @@ -502,6 +503,32 @@ FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c) > could be a reference. > > > +UIO support for DFL devices > +=========================== > +The purpose of an FPGA is to be reprogrammed with newly developed hardware > +components. New hardware can instantiate a new private feature in the DFL, and > +then get a DFL device in their system. In some cases users may need a userspace > +driver for the DFL device: > + > +* Users may need to run some diagnostic test for their hardwares. > +* Users may prototype the kernel driver in user space. > +* Some hardware is designed for specific purposes and does not fit into one of > + the standard kernel subsystems. > + > +This requires the direct access to the MMIO space and interrupt handling in > +userspace. The dfl-uio-pdev module exposes the UIO device interfaces for this > +purpose. It adds the uio_pdrv_genirq platform device with the resources of > +the DFL feature, and lets the generic UIO platform device driver provide UIO > +support to userspace. > + > +FPGA_DFL_UIO_PDEV should be selected to enable this feature. > + > +The DFL UIO driver has a special matching algorithem. It will match any DFL > +device which could not be handled by other DFL drivers. In this way, it will > +not impact the functionality of the features which are already supported by the > +system. > + > + > Open discussion > =============== > FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration
diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst index 0404fe6..b298ad9 100644 --- a/Documentation/fpga/dfl.rst +++ b/Documentation/fpga/dfl.rst @@ -7,6 +7,7 @@ Authors: - Enno Luebbers <enno.luebbers@intel.com> - Xiao Guangrong <guangrong.xiao@linux.intel.com> - Wu Hao <hao.wu@intel.com> +- Xu Yilun <yilun.xu@intel.com> The Device Feature List (DFL) FPGA framework (and drivers according to this framework) hides the very details of low layer hardwares and provides @@ -502,6 +503,32 @@ FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c) could be a reference. +UIO support for DFL devices +=========================== +The purpose of an FPGA is to be reprogrammed with newly developed hardware +components. New hardware can instantiate a new private feature in the DFL, and +then get a DFL device in their system. In some cases users may need a userspace +driver for the DFL device: + +* Users may need to run some diagnostic test for their hardwares. +* Users may prototype the kernel driver in user space. +* Some hardware is designed for specific purposes and does not fit into one of + the standard kernel subsystems. + +This requires the direct access to the MMIO space and interrupt handling in +userspace. The dfl-uio-pdev module exposes the UIO device interfaces for this +purpose. It adds the uio_pdrv_genirq platform device with the resources of +the DFL feature, and lets the generic UIO platform device driver provide UIO +support to userspace. + +FPGA_DFL_UIO_PDEV should be selected to enable this feature. + +The DFL UIO driver has a special matching algorithem. It will match any DFL +device which could not be handled by other DFL drivers. In this way, it will +not impact the functionality of the features which are already supported by the +system. + + Open discussion =============== FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration
This patch adds description for UIO support for dfl devices on DFL bus. Signed-off-by: Xu Yilun <yilun.xu@intel.com> --- v2: no doc in v1, add it for v2. v3: some documentation fixes. --- Documentation/fpga/dfl.rst | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)