diff mbox series

[08/13] drm/i915/pps: abstract intel_pps_reinit()

Message ID aa645d7124f995fda140ec594de7203647a784fa.1608648128.git.jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/dp: split out pps and aux | expand

Commit Message

Jani Nikula Dec. 22, 2020, 2:49 p.m. UTC
Add a "reinit" call to hide some more pps functions, and clean up the
callers. A minor functional change is not holding the pps lock across
the whole operation in intel_dp_encoder_reset, but instead doing it in
two steps.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c  | 20 +++++---------------
 drivers/gpu/drm/i915/display/intel_pps.c | 21 +++++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_pps.h |  3 +--
 3 files changed, 25 insertions(+), 19 deletions(-)

Comments

Gupta, Anshuman Dec. 29, 2020, 6:59 a.m. UTC | #1
On 2020-12-22 at 20:19:48 +0530, Jani Nikula wrote:
> Add a "reinit" call to hide some more pps functions, and clean up the
> callers. A minor functional change is not holding the pps lock across
> the whole operation in intel_dp_encoder_reset, but instead doing it in
> two steps.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Looks good to me.
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c  | 20 +++++---------------
>  drivers/gpu/drm/i915/display/intel_pps.c | 21 +++++++++++++++++++--
>  drivers/gpu/drm/i915/display/intel_pps.h |  3 +--
>  3 files changed, 25 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index de2642d5be3b..334ba1775cd3 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5859,30 +5859,20 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->dev);
>  	struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
> -	intel_wakeref_t wakeref;
>  
>  	if (!HAS_DDI(dev_priv))
>  		intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg);
>  
>  	intel_dp->reset_link_params = true;
>  
> -	if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) &&
> -	    !intel_dp_is_edp(intel_dp))
> -		return;
> +	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> +		intel_wakeref_t wakeref;
>  
> -	with_intel_pps_lock(intel_dp, wakeref) {
> -		if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> +		with_intel_pps_lock(intel_dp, wakeref)
>  			intel_dp->active_pipe = vlv_active_pipe(intel_dp);
> -
> -		if (intel_dp_is_edp(intel_dp)) {
> -			/*
> -			 * Reinit the power sequencer, in case BIOS did
> -			 * something nasty with it.
> -			 */
> -			intel_dp_pps_init(intel_dp);
> -			intel_pps_vdd_sanitize(intel_dp);
> -		}
>  	}
> +
> +	intel_pps_reinit(intel_dp);
>  }
>  
>  static int intel_modeset_tile_group(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 651c79ce4bdd..3e62d1450682 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -1043,7 +1043,7 @@ void vlv_init_panel_power_sequencer(struct intel_encoder *encoder,
>  	intel_dp_init_panel_power_sequencer_registers(intel_dp, true);
>  }
>  
> -void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
> +static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> @@ -1340,7 +1340,7 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
>  		    (intel_de_read(dev_priv, regs.pp_ctrl) & BXT_POWER_CYCLE_DELAY_MASK));
>  }
>  
> -void intel_dp_pps_init(struct intel_dp *intel_dp)
> +static void intel_dp_pps_init(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  
> @@ -1352,6 +1352,23 @@ void intel_dp_pps_init(struct intel_dp *intel_dp)
>  	}
>  }
>  
> +void intel_pps_reinit(struct intel_dp *intel_dp)
> +{
> +	intel_wakeref_t wakeref;
> +
> +	if (!intel_dp_is_edp(intel_dp))
> +		return;
> +
> +	with_intel_pps_lock(intel_dp, wakeref) {
> +		/*
> +		 * Reinit the power sequencer, in case BIOS did something nasty
> +		 * with it.
> +		 */
> +		intel_dp_pps_init(intel_dp);
> +		intel_pps_vdd_sanitize(intel_dp);
> +	}
> +}
> +
>  void intel_pps_init(struct intel_dp *intel_dp)
>  {
>  	intel_wakeref_t wakeref;
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
> index 53c0fafd1440..4780b59a59df 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.h
> +++ b/drivers/gpu/drm/i915/display/intel_pps.h
> @@ -32,7 +32,6 @@ void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync);
>  void intel_pps_on_unlocked(struct intel_dp *intel_dp);
>  void intel_pps_off_unlocked(struct intel_dp *intel_dp);
>  
> -void intel_pps_vdd_sanitize(struct intel_dp *intel_dp);
>  void intel_pps_vdd_on(struct intel_dp *intel_dp);
>  void intel_pps_on(struct intel_dp *intel_dp);
>  void intel_pps_off(struct intel_dp *intel_dp);
> @@ -42,7 +41,7 @@ bool intel_pps_have_power(struct intel_dp *intel_dp);
>  void wait_panel_power_cycle(struct intel_dp *intel_dp);
>  
>  void intel_pps_init(struct intel_dp *intel_dp);
> -void intel_dp_pps_init(struct intel_dp *intel_dp);
> +void intel_pps_reinit(struct intel_dp *intel_dp);
>  void intel_power_sequencer_reset(struct drm_i915_private *i915);
>  
>  void vlv_init_panel_power_sequencer(struct intel_encoder *encoder,
> -- 
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index de2642d5be3b..334ba1775cd3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5859,30 +5859,20 @@  void intel_dp_encoder_reset(struct drm_encoder *encoder)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->dev);
 	struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
-	intel_wakeref_t wakeref;
 
 	if (!HAS_DDI(dev_priv))
 		intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg);
 
 	intel_dp->reset_link_params = true;
 
-	if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) &&
-	    !intel_dp_is_edp(intel_dp))
-		return;
+	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+		intel_wakeref_t wakeref;
 
-	with_intel_pps_lock(intel_dp, wakeref) {
-		if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+		with_intel_pps_lock(intel_dp, wakeref)
 			intel_dp->active_pipe = vlv_active_pipe(intel_dp);
-
-		if (intel_dp_is_edp(intel_dp)) {
-			/*
-			 * Reinit the power sequencer, in case BIOS did
-			 * something nasty with it.
-			 */
-			intel_dp_pps_init(intel_dp);
-			intel_pps_vdd_sanitize(intel_dp);
-		}
 	}
+
+	intel_pps_reinit(intel_dp);
 }
 
 static int intel_modeset_tile_group(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 651c79ce4bdd..3e62d1450682 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1043,7 +1043,7 @@  void vlv_init_panel_power_sequencer(struct intel_encoder *encoder,
 	intel_dp_init_panel_power_sequencer_registers(intel_dp, true);
 }
 
-void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
+static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
@@ -1340,7 +1340,7 @@  intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
 		    (intel_de_read(dev_priv, regs.pp_ctrl) & BXT_POWER_CYCLE_DELAY_MASK));
 }
 
-void intel_dp_pps_init(struct intel_dp *intel_dp)
+static void intel_dp_pps_init(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
@@ -1352,6 +1352,23 @@  void intel_dp_pps_init(struct intel_dp *intel_dp)
 	}
 }
 
+void intel_pps_reinit(struct intel_dp *intel_dp)
+{
+	intel_wakeref_t wakeref;
+
+	if (!intel_dp_is_edp(intel_dp))
+		return;
+
+	with_intel_pps_lock(intel_dp, wakeref) {
+		/*
+		 * Reinit the power sequencer, in case BIOS did something nasty
+		 * with it.
+		 */
+		intel_dp_pps_init(intel_dp);
+		intel_pps_vdd_sanitize(intel_dp);
+	}
+}
+
 void intel_pps_init(struct intel_dp *intel_dp)
 {
 	intel_wakeref_t wakeref;
diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
index 53c0fafd1440..4780b59a59df 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.h
+++ b/drivers/gpu/drm/i915/display/intel_pps.h
@@ -32,7 +32,6 @@  void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync);
 void intel_pps_on_unlocked(struct intel_dp *intel_dp);
 void intel_pps_off_unlocked(struct intel_dp *intel_dp);
 
-void intel_pps_vdd_sanitize(struct intel_dp *intel_dp);
 void intel_pps_vdd_on(struct intel_dp *intel_dp);
 void intel_pps_on(struct intel_dp *intel_dp);
 void intel_pps_off(struct intel_dp *intel_dp);
@@ -42,7 +41,7 @@  bool intel_pps_have_power(struct intel_dp *intel_dp);
 void wait_panel_power_cycle(struct intel_dp *intel_dp);
 
 void intel_pps_init(struct intel_dp *intel_dp);
-void intel_dp_pps_init(struct intel_dp *intel_dp);
+void intel_pps_reinit(struct intel_dp *intel_dp);
 void intel_power_sequencer_reset(struct drm_i915_private *i915);
 
 void vlv_init_panel_power_sequencer(struct intel_encoder *encoder,