| Message ID | 1609989081-29353-6-git-send-email-yongqiang.niu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/mediatek: add support for mediatek SOC MT8183 | expand |
Hi, Yongqiang: Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年1月7日 週四 上午11:12寫道： > > Get the fifo size from device tree > because each rdma in the same SoC may have different fifo size Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > index d46b8ae..8c64d5c 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > @@ -64,6 +64,7 @@ struct mtk_disp_rdma { > struct mtk_ddp_comp ddp_comp; > struct drm_crtc *crtc; > const struct mtk_disp_rdma_data *data; > + u32 fifo_size; > }; > > static inline struct mtk_disp_rdma *comp_to_rdma(struct mtk_ddp_comp *comp) > @@ -132,12 +133,18 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > unsigned int threshold; > unsigned int reg; > struct mtk_disp_rdma *rdma = comp_to_rdma(comp); > + u32 rdma_fifo_size; > > mtk_ddp_write_mask(cmdq_pkt, width, comp, > DISP_REG_RDMA_SIZE_CON_0, 0xfff); > mtk_ddp_write_mask(cmdq_pkt, height, comp, > DISP_REG_RDMA_SIZE_CON_1, 0xfffff); > > + if (rdma->fifo_size) > + rdma_fifo_size = rdma->fifo_size; > + else > + rdma_fifo_size = RDMA_FIFO_SIZE(rdma); > + > /* > * Enable FIFO underflow since DSI and DPI can't be blocked. > * Keep the FIFO pseudo size reset default of 8 KiB. Set the > @@ -146,7 +153,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > */ > threshold = width * height * vrefresh * 4 * 7 / 1000000; > reg = RDMA_FIFO_UNDERFLOW_EN | > - RDMA_FIFO_PSEUDO_SIZE(RDMA_FIFO_SIZE(rdma)) | > + RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | > RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold); > mtk_ddp_write(cmdq_pkt, reg, comp, DISP_REG_RDMA_FIFO_CON); > } > @@ -292,6 +299,16 @@ static int mtk_disp_rdma_probe(struct platform_device *pdev) > return comp_id; > } > > + if (of_find_property(dev->of_node, "mediatek,rdma-fifo-size", &ret)) { > + ret = of_property_read_u32(dev->of_node, > + "mediatek,rdma-fifo-size", > + &priv->fifo_size); > + if (ret) { > + dev_err(dev, "Failed to get rdma fifo size\n"); > + return ret; > + } > + } > + > ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id, > &mtk_disp_rdma_funcs); > if (ret) { > -- > 1.8.1.1.dirty > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Hi, Yongqiang: Chun-Kuang Hu <chunkuang.hu@kernel.org> 於 2021年1月7日 週四 下午6:05寫道： > > Hi, Yongqiang: > > Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年1月7日 週四 上午11:12寫道： > > > > Get the fifo size from device tree > > because each rdma in the same SoC may have different fifo size > > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. > > > > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 19 ++++++++++++++++++- > > 1 file changed, 18 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > index d46b8ae..8c64d5c 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > @@ -64,6 +64,7 @@ struct mtk_disp_rdma { > > struct mtk_ddp_comp ddp_comp; > > struct drm_crtc *crtc; > > const struct mtk_disp_rdma_data *data; > > + u32 fifo_size; > > }; > > > > static inline struct mtk_disp_rdma *comp_to_rdma(struct mtk_ddp_comp *comp) > > @@ -132,12 +133,18 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > > unsigned int threshold; > > unsigned int reg; > > struct mtk_disp_rdma *rdma = comp_to_rdma(comp); > > + u32 rdma_fifo_size; > > > > mtk_ddp_write_mask(cmdq_pkt, width, comp, > > DISP_REG_RDMA_SIZE_CON_0, 0xfff); > > mtk_ddp_write_mask(cmdq_pkt, height, comp, > > DISP_REG_RDMA_SIZE_CON_1, 0xfffff); > > > > + if (rdma->fifo_size) > > + rdma_fifo_size = rdma->fifo_size; > > + else > > + rdma_fifo_size = RDMA_FIFO_SIZE(rdma); > > + > > /* > > * Enable FIFO underflow since DSI and DPI can't be blocked. > > * Keep the FIFO pseudo size reset default of 8 KiB. Set the > > @@ -146,7 +153,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > > */ > > threshold = width * height * vrefresh * 4 * 7 / 1000000; > > reg = RDMA_FIFO_UNDERFLOW_EN | > > - RDMA_FIFO_PSEUDO_SIZE(RDMA_FIFO_SIZE(rdma)) | > > + RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | > > RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold); > > mtk_ddp_write(cmdq_pkt, reg, comp, DISP_REG_RDMA_FIFO_CON); > > } > > @@ -292,6 +299,16 @@ static int mtk_disp_rdma_probe(struct platform_device *pdev) > > return comp_id; > > } > > > > + if (of_find_property(dev->of_node, "mediatek,rdma-fifo-size", &ret)) { > > + ret = of_property_read_u32(dev->of_node, > > + "mediatek,rdma-fifo-size", > > + &priv->fifo_size); > > + if (ret) { > > + dev_err(dev, "Failed to get rdma fifo size\n"); > > + return ret; > > + } > > + } > > + > > ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id, > > &mtk_disp_rdma_funcs); > > if (ret) { > > -- > > 1.8.1.1.dirty > > _______________________________________________ > > Linux-mediatek mailing list > > Linux-mediatek@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c index d46b8ae..8c64d5c 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c @@ -64,6 +64,7 @@ struct mtk_disp_rdma { struct mtk_ddp_comp ddp_comp; struct drm_crtc *crtc; const struct mtk_disp_rdma_data *data; + u32 fifo_size; }; static inline struct mtk_disp_rdma *comp_to_rdma(struct mtk_ddp_comp *comp) @@ -132,12 +133,18 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, unsigned int threshold; unsigned int reg; struct mtk_disp_rdma *rdma = comp_to_rdma(comp); + u32 rdma_fifo_size; mtk_ddp_write_mask(cmdq_pkt, width, comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff); mtk_ddp_write_mask(cmdq_pkt, height, comp, DISP_REG_RDMA_SIZE_CON_1, 0xfffff); + if (rdma->fifo_size) + rdma_fifo_size = rdma->fifo_size; + else + rdma_fifo_size = RDMA_FIFO_SIZE(rdma); + /* * Enable FIFO underflow since DSI and DPI can't be blocked. * Keep the FIFO pseudo size reset default of 8 KiB. Set the @@ -146,7 +153,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, */ threshold = width * height * vrefresh * 4 * 7 / 1000000; reg = RDMA_FIFO_UNDERFLOW_EN | - RDMA_FIFO_PSEUDO_SIZE(RDMA_FIFO_SIZE(rdma)) | + RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold); mtk_ddp_write(cmdq_pkt, reg, comp, DISP_REG_RDMA_FIFO_CON); } @@ -292,6 +299,16 @@ static int mtk_disp_rdma_probe(struct platform_device *pdev) return comp_id; } + if (of_find_property(dev->of_node, "mediatek,rdma-fifo-size", &ret)) { + ret = of_property_read_u32(dev->of_node, + "mediatek,rdma-fifo-size", + &priv->fifo_size); + if (ret) { + dev_err(dev, "Failed to get rdma fifo size\n"); + return ret; + } + } + ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id, &mtk_disp_rdma_funcs); if (ret) {
Get the fifo size from device tree because each rdma in the same SoC may have different fifo size Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)