diff mbox series

[RFC-v19,09/13] drm/i915/pxp: Expose session state for display protection flip

Message ID 20210106231223.8323-10-sean.z.huang@intel.com (mailing list archive)
State New, archived
Headers show
Series Introduce Intel PXP component - Mesa single session | expand

Commit Message

Huang, Sean Z Jan. 6, 2021, 11:12 p.m. UTC
Implement the intel_pxp_gem_object_status() to allow i915 display
querying the current PXP session state. In the design, display
should not perform protection flip on the protected buffers if
there is no PXP session alive. And Implement the funciton to set
the protected flag for gem context.

Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
 drivers/gpu/drm/i915/pxp/intel_pxp.c | 21 +++++++++++++++++++++
 drivers/gpu/drm/i915/pxp/intel_pxp.h | 18 ++++++++++++++++++
 2 files changed, 39 insertions(+)

Comments

Rodrigo Vivi Jan. 7, 2021, 3:54 p.m. UTC | #1
On Wed, 2021-01-06 at 15:12 -0800, Huang, Sean Z wrote:
> Implement the intel_pxp_gem_object_status() to allow i915 display
> querying the current PXP session state. In the design, display
> should not perform protection flip on the protected buffers if
> there is no PXP session alive. And Implement the funciton to set
> the protected flag for gem context.
> 
> Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
> ---
>  drivers/gpu/drm/i915/pxp/intel_pxp.c | 21 +++++++++++++++++++++
>  drivers/gpu/drm/i915/pxp/intel_pxp.h | 18 ++++++++++++++++++
>  2 files changed, 39 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index 23d4cfc1fb1f..a28a459532c2 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -158,3 +158,24 @@ void intel_pxp_irq_handler(struct intel_pxp
> *pxp, u16 iir)
>         pxp->current_events |= events;
>         schedule_work(&pxp->irq_work);
>  }
> +
> +bool intel_pxp_gem_object_status(struct drm_i915_private *i915)
> +{
> +       if (i915->gt.pxp.ctx.inited &&
> +           i915->gt.pxp.ctx.flag_display_hm_surface_keys)
> +               return true;
> +       else
> +               return false;
> +}
> +
> +int intel_pxp_gem_context_set_protected(struct drm_i915_private
> *i915,
> +                                       unsigned long *user_flags,
> +                                       u32 protected_bit)
> +{
> +       if (!user_flags || !protected_bit ||
> +           !intel_pxp_arb_session_is_in_play(&i915->gt.pxp))
> +               return -EINVAL;
> +
> +       set_bit(protected_bit, user_flags);

This protected_bit should only be set during context creation and never
modified with set_context.

> +       return 0;
> +}
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> index cdaa6ce6fdca..ff1c1c0e720c 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> @@ -29,6 +29,8 @@ enum pxp_protection_modes {
>         PROTECTION_MODE_ALL
>  };
>  
> +struct drm_i915_private;
> +
>  #ifdef CONFIG_DRM_I915_PXP
>  void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir);
>  int i915_pxp_teardown_required_callback(struct intel_pxp *pxp);
> @@ -36,6 +38,10 @@ int
> i915_pxp_global_terminate_complete_callback(struct intel_pxp *pxp);
>  
>  void intel_pxp_init(struct intel_pxp *pxp);
>  void intel_pxp_fini(struct intel_pxp *pxp);
> +bool intel_pxp_gem_object_status(struct drm_i915_private *i915);
> +int intel_pxp_gem_context_set_protected(struct drm_i915_private
> *i915,
> +                                       unsigned long *user_flag,
> +                                       u32 protected_bit);
>  #else
>  static inline void intel_pxp_irq_handler(struct intel_pxp *pxp, u16
> iir)
>  {
> @@ -58,6 +64,18 @@ static inline void intel_pxp_init(struct intel_pxp
> *pxp)
>  static inline void intel_pxp_fini(struct intel_pxp *pxp)
>  {
>  }
> +
> +static inline bool intel_pxp_gem_object_status(struct
> drm_i915_private *i915)
> +{
> +       return false;
> +}
> +
> +static inline int intel_pxp_gem_context_set_protected(struct
> drm_i915_private *i915,
> +                                                     unsigned long
> *user_flag,
> +                                                     u32
> protected_bit)
> +{
> +       return 0;
> +}
>  #endif
>  
>  #endif /* __INTEL_PXP_H__ */
Huang, Sean Z Jan. 18, 2021, 8:23 a.m. UTC | #2
Hi Rodrigo,

Quoted from your feedback: "This protected_bit should only be set during context creation and never modified with set_context."

I have modified the code accordingly at rev21 https://patchwork.freedesktop.org/series/84620/#rev21 

Best regards,
Sean

-----Original Message-----
From: Vivi, Rodrigo <rodrigo.vivi@intel.com> 
Sent: Thursday, January 7, 2021 7:55 AM
To: Huang, Sean Z <sean.z.huang@intel.com>; Intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [RFC-v19 09/13] drm/i915/pxp: Expose session state for display protection flip

On Wed, 2021-01-06 at 15:12 -0800, Huang, Sean Z wrote:
> Implement the intel_pxp_gem_object_status() to allow i915 display 
> querying the current PXP session state. In the design, display should 
> not perform protection flip on the protected buffers if there is no 
> PXP session alive. And Implement the funciton to set the protected 
> flag for gem context.
> 
> Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
> ---
>  drivers/gpu/drm/i915/pxp/intel_pxp.c | 21 +++++++++++++++++++++  
> drivers/gpu/drm/i915/pxp/intel_pxp.h | 18 ++++++++++++++++++
>  2 files changed, 39 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index 23d4cfc1fb1f..a28a459532c2 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -158,3 +158,24 @@ void intel_pxp_irq_handler(struct intel_pxp *pxp, 
> u16 iir)
>         pxp->current_events |= events;
>         schedule_work(&pxp->irq_work);  }
> +
> +bool intel_pxp_gem_object_status(struct drm_i915_private *i915) {
> +       if (i915->gt.pxp.ctx.inited &&
> +           i915->gt.pxp.ctx.flag_display_hm_surface_keys)
> +               return true;
> +       else
> +               return false;
> +}
> +
> +int intel_pxp_gem_context_set_protected(struct drm_i915_private
> *i915,
> +                                       unsigned long *user_flags,
> +                                       u32 protected_bit) {
> +       if (!user_flags || !protected_bit ||
> +           !intel_pxp_arb_session_is_in_play(&i915->gt.pxp))
> +               return -EINVAL;
> +
> +       set_bit(protected_bit, user_flags);

This protected_bit should only be set during context creation and never modified with set_context.

> +       return 0;
> +}
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> index cdaa6ce6fdca..ff1c1c0e720c 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> @@ -29,6 +29,8 @@ enum pxp_protection_modes {
>         PROTECTION_MODE_ALL
>  };
>  
> +struct drm_i915_private;
> +
>  #ifdef CONFIG_DRM_I915_PXP
>  void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir);  int 
> i915_pxp_teardown_required_callback(struct intel_pxp *pxp); @@ -36,6 
> +38,10 @@ int i915_pxp_global_terminate_complete_callback(struct 
> intel_pxp *pxp);
>  
>  void intel_pxp_init(struct intel_pxp *pxp);  void 
> intel_pxp_fini(struct intel_pxp *pxp);
> +bool intel_pxp_gem_object_status(struct drm_i915_private *i915); int 
> +intel_pxp_gem_context_set_protected(struct drm_i915_private
> *i915,
> +                                       unsigned long *user_flag,
> +                                       u32 protected_bit);
>  #else
>  static inline void intel_pxp_irq_handler(struct intel_pxp *pxp, u16
> iir)
>  {
> @@ -58,6 +64,18 @@ static inline void intel_pxp_init(struct intel_pxp
> *pxp)
>  static inline void intel_pxp_fini(struct intel_pxp *pxp)  {  }
> +
> +static inline bool intel_pxp_gem_object_status(struct
> drm_i915_private *i915)
> +{
> +       return false;
> +}
> +
> +static inline int intel_pxp_gem_context_set_protected(struct
> drm_i915_private *i915,
> +                                                     unsigned long
> *user_flag,
> +                                                     u32
> protected_bit)
> +{
> +       return 0;
> +}
>  #endif
>  
>  #endif /* __INTEL_PXP_H__ */
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 23d4cfc1fb1f..a28a459532c2 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -158,3 +158,24 @@  void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
 	pxp->current_events |= events;
 	schedule_work(&pxp->irq_work);
 }
+
+bool intel_pxp_gem_object_status(struct drm_i915_private *i915)
+{
+	if (i915->gt.pxp.ctx.inited &&
+	    i915->gt.pxp.ctx.flag_display_hm_surface_keys)
+		return true;
+	else
+		return false;
+}
+
+int intel_pxp_gem_context_set_protected(struct drm_i915_private *i915,
+					unsigned long *user_flags,
+					u32 protected_bit)
+{
+	if (!user_flags || !protected_bit ||
+	    !intel_pxp_arb_session_is_in_play(&i915->gt.pxp))
+		return -EINVAL;
+
+	set_bit(protected_bit, user_flags);
+	return 0;
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index cdaa6ce6fdca..ff1c1c0e720c 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -29,6 +29,8 @@  enum pxp_protection_modes {
 	PROTECTION_MODE_ALL
 };
 
+struct drm_i915_private;
+
 #ifdef CONFIG_DRM_I915_PXP
 void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir);
 int i915_pxp_teardown_required_callback(struct intel_pxp *pxp);
@@ -36,6 +38,10 @@  int i915_pxp_global_terminate_complete_callback(struct intel_pxp *pxp);
 
 void intel_pxp_init(struct intel_pxp *pxp);
 void intel_pxp_fini(struct intel_pxp *pxp);
+bool intel_pxp_gem_object_status(struct drm_i915_private *i915);
+int intel_pxp_gem_context_set_protected(struct drm_i915_private *i915,
+					unsigned long *user_flag,
+					u32 protected_bit);
 #else
 static inline void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
 {
@@ -58,6 +64,18 @@  static inline void intel_pxp_init(struct intel_pxp *pxp)
 static inline void intel_pxp_fini(struct intel_pxp *pxp)
 {
 }
+
+static inline bool intel_pxp_gem_object_status(struct drm_i915_private *i915)
+{
+	return false;
+}
+
+static inline int intel_pxp_gem_context_set_protected(struct drm_i915_private *i915,
+						      unsigned long *user_flag,
+						      u32 protected_bit)
+{
+	return 0;
+}
 #endif
 
 #endif /* __INTEL_PXP_H__ */