| Message ID | 20210101213759.2070-1-olek2@wp.pl (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | dea44af8d2ae89b8c1e95f7abf1cfb4132a2bc4e |
| Headers | show |
| Series | dt-bindings: mips: lantiq: Document Lantiq Xway EBU bindings | expand |
On Fri, 01 Jan 2021 22:37:59 +0100, Aleksander Jan Bajkowski wrote: > Document the Lantiq Xway SoC series External Bus Unit (EBU) bindings. > > Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> > --- > .../bindings/mips/lantiq/lantiq,ebu.yaml | 32 +++++++++++++++++++ > 1 file changed, 32 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,ebu.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
On Fri, Jan 01, 2021 at 10:37:59PM +0100, Aleksander Jan Bajkowski wrote: > Document the Lantiq Xway SoC series External Bus Unit (EBU) bindings. > > Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> > --- > .../bindings/mips/lantiq/lantiq,ebu.yaml | 32 +++++++++++++++++++ > 1 file changed, 32 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,ebu.yaml applied to mips-next. Thomas.
(again, sorry for seeing this patch late) > +properties: > + compatible: > + items: > + - enum: > + - lantiq,ebu-xway I think this compatible string is very generic and with that comes some problems. There is actually two different versions of this IP: one which has support for controlling the interrupt of the PCI controller on some SoCs (Danube, xRX100, xRX200). Other SoC variants (Falcon, Amazon-SE) don't have that interrupt-controller as they don't have PCI support. Also there is at least one clock input. I *assume* we need to describe it but I am not sure (as this platform doesn't use the common clock framework yet). My version of this can be found here [0]. It's still sitting in my tree because it has a dependency on an ICU patch in my tree which I could not make work properly yet. Best regards, Martin [0] https://github.com/xdarklight/linux/blob/8d5c632e11fe0ca14497efc2f9d99b69f75590ba/Documentation/devicetree/bindings/mips/lantiq/lantiq%2Cebu.yaml
diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,ebu.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,ebu.yaml new file mode 100644 index 000000000000..0fada1f085a9 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/lantiq/lantiq,ebu.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,ebu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lantiq Xway SoC series External Bus Unit (EBU) + +maintainers: + - John Crispin <john@phrozen.org> + +properties: + compatible: + items: + - enum: + - lantiq,ebu-xway + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + ebu@105300 { + compatible = "lantiq,ebu-xway"; + reg = <0x105300 0x100>; + };
Document the Lantiq Xway SoC series External Bus Unit (EBU) bindings. Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> --- .../bindings/mips/lantiq/lantiq,ebu.yaml | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,ebu.yaml